SIP packaging assembly and packaging method and manufacturing method thereof
A technology for encapsulating components and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., and can solve problems such as unsuitable miniaturization requirements, substrate space occupation, possible component or complete area cutting, etc.
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Embodiment 1
[0053] A SIP packaged component such as figure 1 As mentioned above, the integral outer surface of the plastic package of the packaging component includes at least two shielding layer regions 2; The outer surface does not involve the slotting of the plastic package to obtain the spacer area.
[0054] Wherein, there is a spacer area 1 between any two shielding layer areas 2 .
[0055] It should be noted that the outer surface of the packaged component is its shielding layer as a whole. The implementation of this example does not require additional hardware structures. Only by dividing the shielding layer itself on the outer surface can prevent the shielding body from becoming a high-frequency and high-frequency shielding layer. The medium of power noise, thereby avoiding mutual interference between devices.
[0056] In this embodiment, through the division of the shielding layer on the outer surface of the plastic package, the shielding body is prevented from becoming a mediu...
Embodiment 2
[0058] The SIP encapsulation component of this embodiment is further improved on the basis of Embodiment 1, such as Figure 2-3 As shown, the package assembly includes a substrate 3, and at least two devices are arranged on the substrate 3;
[0059] The position of the spacer area 1 corresponds to the first area on the substrate 3;
[0060] The first area includes an area between the installation positions of any two devices on the substrate 3 .
[0061] It should be noted that the spacer area 1 can be set at the corresponding positions between all or specific several devices according to the needs, or, see figure 2 , based on the consideration of the impact of high-frequency high-power noise, choose to set the interval region 1 at the corresponding position between the device 41 (such as PA power amplification unit) that generates high-frequency high-power noise and other adjacent devices 42 .
[0062] In this embodiment, in order to avoid the influence of high-frequency and...
Embodiment 3
[0064] The SIP encapsulation component of this embodiment is further improved on the basis of Embodiment 1, such as Figure 4-5 As shown, the package assembly includes a substrate 3, on which at least one interference source device 43 and at least one interfered device 44 corresponding to the interference source device 43 are arranged;
[0065] The position of the spacer region 1 corresponds to the second region on the substrate 3;
[0066] The second area includes the area between the installation positions of the interference source device 43 and the corresponding interfered device 44 on the substrate 3 .
[0067] It should be noted that in practical applications, it is sufficient to combine the fact of interference between devices in the package assembly to achieve interference suppression between the two interfering devices. Therefore, after specifying the devices installed inside the package assembly, specify The interference source device and the corresponding interfere...
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