Source-drain asymmetric ring gate reconfigurable field effect transistor

Abstract

The invention discloses a source-drain asymmetric ring gate reconfigurable field effect transistor, which comprises a vertically arranged nanosheet or nanowire channel, a gate oxide which wraps the channel and is positioned below a gate and a gate isolator, and a control gate and a polar gate which are respectively and symmetrically arranged on the outer side of the gate oxide, the grid isolation is wrapped outside the channel and used for isolating the control grid and the polar grid, the side walls are arranged at the left end and the right end of the channel and wrapped outside the channel, the drain is arranged at one end of the channel, the source extends towards the inside of the source side wall at the other end of the channel, and the substrate is arranged at the bottom. Compared with an existing source-drain symmetric device, the source extending into the source side wall increases the contact area of a source end and a channel, the tunneling probability of a carrier line is increased, and the on-state current is improved. During turn-off, non-overlapping areas of the drain end structure and the drain structure of the source-drain symmetrical device are the same, and off-state current is basically kept unchanged, so that a more ideal current switch ratio is achieved, and the logic response is faster.

Description

technical field [0001] The invention belongs to the field effect transistor field in semiconductor devices, in particular to a gate-around reconfigurable field effect transistor with asymmetric source and drain. Background technique [0002] The shrinking of transistor size has witnessed the development of semiconductor technology. With the continuous advancement of process nodes, the performance degradation of traditional bulk silicon devices cannot be ignored. At the same time, economic constraints and process barriers also pose a huge challenge to the continuation of Moore's Law. Many new device structures have been proposed one after another. Among them, Nanosheet Gate-All-Around Field-Effect Transistor (Nanosheet Gate-All-Around Field-Effect Transistor) and Nanowire Gate-All-Around Field-Effect Transistor (Nanowire Gate-All-Around Field-Effect Transistor) have excellent gate control capabilities, excellent Electrostatic integrity, becoming one of the most attractive st...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to solve the problem that the current of the existing source-drain symmetric gate-around reconfigurable field effect transistor is small, and propose a source-drain asymmetric gate-around reconfigurable field effect transistor, by increasing the source The tunneling probability of terminal carrier lines increases the tunneling area of ​​carriers and increases the on-state current of the device. At the same time, the off-state current remains basically unchanged, the current switching ratio of the device is improved, and the logic response time of the integrated circuit is reduced.

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