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PCIE equipment fault processing method and device

A technology of equipment faults and processing methods, which is applied in the server field, can solve the problems of unable to interrupt the propagation of PCIE fault information, and achieve the effects of meeting fault processing requirements, enhancing stability, and reducing downtime

Active Publication Date: 2022-04-15
ALIBABA (CHINA) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] This application provides a PCIE device fault handling method to solve the problem that the prior art cannot interrupt the propagation of PCIE fault information

Method used

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  • PCIE equipment fault processing method and device
  • PCIE equipment fault processing method and device
  • PCIE equipment fault processing method and device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0063] Please refer to figure 1 , which is a flow chart of the PCIE device fault handling method of the present application. In this embodiment, the method may include the following steps:

[0064] Step S101: The basic input and output system BIOS obtains the usage information of the PCIE slot, and the usage information of the PCIE slot includes the type of the PCIE device.

[0065] The Basic Input Output System (BIOS) is an industry-standard firmware interface. It is the first software loaded when the computer is started. It can read and write the specific information of the system settings from the CMOS.

[0066] PCIE (peripheral component interconnect express) is a high-speed serial computer expansion bus standard. It belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission. The connected devices allocate exclusive channel bandwidth and do not share bus bandwidth. It supports hot plug and error Reporting and other functions.

[0067] PCIE devi...

no. 2 example

[0102] In the foregoing embodiments, a PCIE device fault handling method is provided, and correspondingly, the present application also provides a PCIE device fault handling device. The device corresponds to the embodiment of the above-mentioned method. Since the device embodiment is basically similar to the method embodiment, the description is relatively simple, and for relevant parts, refer to the part of the description of the method embodiment. The device embodiments described below are illustrative only.

[0103] The present application further provides a PCIE device fault processing device, including: a PCIE information acquisition unit, a dynamic enabling DPC unit, and a DPC processing unit. Wherein, the PCIE information acquisition unit is used to obtain the PCIE slot usage information when the basic input and output system BIOS is initialized, and the PCIE slot usage information includes the PCIE device type; the dynamic enabling DPC unit is used for according to th...

no. 3 example

[0113]In the above embodiments, a PCIE device fault handling method is provided, and correspondingly, the present application also provides a basic input and output system. The device corresponds to the embodiment of the above-mentioned method. Since the device embodiment is basically similar to the method embodiment, the description is relatively simple, and for relevant parts, refer to the part of the description of the method embodiment. The device embodiments described below are illustrative only.

[0114] A kind of basic input output system of the present embodiment, comprises: initialization module, is used to obtain PCIE slot usage information, and described PCIE slot usage information includes PCIE device type; According to described PCIE device type, set described PCIE The downlink port of the IIO port of the integrated input and output module corresponding to the slot suppresses the opening or closing of the DPC function, so that the PCIE device failure can be handl...

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Abstract

The invention discloses a PCIE (Peripheral Component Interface Express) equipment fault processing method and device. The method comprises the following steps: acquiring PCIE (Peripheral Component Interface Express) equipment type information on a PCIE slot when a BIOS is initialized; according to the PCIE equipment type information, setting a DPC function of an IIO port corresponding to the PCIE slot to be opened or closed; according to the technical scheme, the PCIE equipment fault is processed through the DPC, and when the PCIE fault occurs, the PCIE link is rapidly disconnected and then reconnected through the combined action of the BIOS and the operating system, so that rapid recovery of the fault is completed, downtime caused by the PCIE fault is reduced, normal use of the server can still be kept when the PCIE fault occurs, and the stability of the server is enhanced. By the adoption of the processing mode, the DPC functions of the IIO ports corresponding to the different PCIE devices are set in a targeted mode, the situation that due to the fact that unified setting options are adopted, part of the PCIE devices cannot be reconnected after being disconnected is avoided, and the fault processing requirements of the different PCIE devices can be met.

Description

technical field [0001] The present application relates to the technical field of servers, in particular to a method and device for troubleshooting PCIE equipment, a basic input and output system, and a motherboard management controller. Background technique [0002] With the popularization and application of cloud computing, more and more data centers need to be established. Servers are important infrastructure in data centers, and their stability directly affects the experience and value of cloud services. The PCIE (High Speed ​​Serial Computer Expansion Bus Standard) device is an important component of the server. It is configured on each server. When the PCIE device has an uncorrectable fault, it will directly affect the operating system OS of the server and cause the server to go down. [0003] Currently, the server mainly uses a standard PCIE Advanced Error Reporting (Advanced Error Reporting, AER) mechanism to handle PCIE faults. Under this mechanism, there are two im...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/07
CPCG06F11/0745G06F11/0793G06F11/0766
Inventor 薛荀
Owner ALIBABA (CHINA) CO LTD
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