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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of arc discharge damage, plasma damage, etc., to improve reliability, reduce the probability, The effect of avoiding plasma damage

Pending Publication Date: 2022-05-03
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide a semiconductor device and its manufacturing method to solve the problems of plasma damage and arc discharge damage to the substrate

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0031] The semiconductor device and its manufacturing method proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0032] figure 1 It is a schematic flowchart of a manufacturing method of a semiconductor device provided by an embodiment of the present invention. Such as figure 1 As shown, the present embodiment provides a method for manufacturing a semiconductor device, the method for manufacturing a semiconductor device includes:

[0033] Step S1: providing a semiconductor substrate, on which a plurality of discrete conductive layers are formed, and the semiconduc...

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof, and the method comprises the steps: firstly forming a passivation layer, enabling the passivation layer to cover the side wall and top of a conductive layer and a semiconductor substrate, and enabling the passivation layer to protect the conductive layer and the semiconductor substrate, and to prevent dust or water vapor, and the like; then, a side wall material layer is formed on the passivation layer, the passivation layer is covered with the side wall material layer, and then the side wall material layer is etched to remove the side wall material layer on the semiconductor substrate and the side wall material layer on the top of the conductive layer; and the side wall material layer on the side wall of the conductive layer is reserved to form the side wall layer, and the side wall layer can play a role in supporting the conductive layer, so that the conductive layer is prevented from collapsing or inclining in a high-temperature environment. Compared with the prior art, in the process of etching the passivation layer, the over-etching amount of the passivation layer is small, the conductive layer below the passivation layer can be prevented from being damaged, and therefore plasma damage is avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the technical field of semiconductor manufacturing, a pad structure is usually prepared on a wafer so that the wafer can be bonded to other components based on the pad structure. Wherein, in the process of preparing the pad structure, a conductive layer is usually formed first, then a passivation layer is formed on the conductive layer, and the passivation layer is etched to form an opening to expose the conductive layer, Then, the conductive layer is drawn out by filling the opening with a conductive material to form a pad structure. [0003] In order to avoid the collapse of the conductive layer under high temperature environment, it is necessary to make the thickness of the passivation layer on the side wall of the conductive layer greater than the thickness of the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/56H01L21/8234H01L23/31H01L27/088
CPCH01L21/56H01L21/823468H01L27/088H01L23/3171
Inventor 陈宏
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP