Phase unwrapping algorithm based on double counters

A phase unwrapping, double counter technology, applied in the field of signal processing, to achieve the effect of improving real-time performance and solving slow calculation speed

Pending Publication Date: 2022-05-13
NAT INST OF METROLOGY CHINA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0023] The above algorithm includes remainder, rounding and division ope

Method used

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  • Phase unwrapping algorithm based on double counters
  • Phase unwrapping algorithm based on double counters
  • Phase unwrapping algorithm based on double counters

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Experimental program
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Embodiment 1

[0071] This algorithm is also applicable to two-dimensional expansion problems, such as Image 6 As shown, the original 3D graph constructed in MATLAB adds noise to the original 3D graph as Figure 7 As shown, the corresponding two-dimensional grayscale image containing noise is obtained as Figure 8 As shown, the three-dimensional phase folding diagram obtained by the arc tangent of the above three-dimensional image is as follows Figure 9 As shown, the two-dimensional diagram of the obtained phase folding is shown as Figure 10 As shown, the above phase unwrapping algorithm is applied to phase unwrap the rows and columns of the two-dimensional image, and the obtained three-dimensional image is as follows Figure 11 As shown, the original image can be restored by separately processing the data at the edge of the three-dimensional image.

Embodiment 2

[0073] This algorithm transforms the one-dimensional phase unwrapping algorithm on the software platform to be suitable for the FPGA platform. Part of the Verilog code is attached below for illustration:

[0074]

[0075]

[0076]

[0077]

[0078] The above is a Verilog code fragment, which specifically describes the core code implemented on the FPGA. The above pi is the fixed-point constant corresponding to pi; M, N, O, P, Q, and L are the digits of the corresponding variables. The sizes of M, N, O, P, Q, and L can be modified according to requirements.

[0079] The above clk is the system clock, unwrap_fig is valid when the reset signal is 0, dout_last_reg1 is valid when the data valid signal is 1, pi_2 is a constant corresponding to the fixed-point number of 2π, pi_2n is the fixed-point number corresponding to 2π*delta, and phase_reg1 is the truncated phase The result of one beat, phase_reg is the truncated phase, phase_reg2 is the result of two beats of the tr...

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Abstract

The invention relates to the technical field of signal processing, in particular to a phase unwrapping algorithm based on double counters, which comprises the following steps of: calculating a difference value between a front phase and a rear phase, judging whether the difference value is greater than a threshold value of phase truncation, adding 1 to a corresponding counter if the difference value is greater than the threshold value, and judging the relative size of the counter if not; subtracting the counter with the small numerical value from the counter with the large numerical value, assigning a result to the counter with the large numerical value, setting the numerical value of the counter with the small numerical value to be 0, calculating a difference value of the two counters, and performing first-step compensation on the phase. Calculating the difference between the current phase value and the rear phase value as well as the difference between the current phase value and the front phase value, comparing the difference results of the phase values with a threshold value, and if the difference results of the phase values are greater than the threshold value, subtracting two times of the threshold value from the current phase value; if the numerical difference results are all smaller than the threshold value, the current phase value is added with two times of the threshold value, otherwise, the current phase value is kept unchanged, the problems that a phase unwrapping algorithm is low in speed and high in complexity are solved, and the phase unwrapping algorithm is suitable for an FPGA platform at the same time.

Description

technical field [0001] The invention relates to the technical field of signal processing, in particular to a phase unwrapping algorithm based on double counters. Background technique [0002] Phase unwrapping is a classic signal processing problem, which refers to recovering the original phase value from the value interval (-π,π] or (0,2π]. When using the arctangent function to calculate the phase, the actual extracted phase is The wrapped phase value wrapped in a periodic phase interval is not the real obtained phase, and restoring the wrapped phase to the real continuous phase is the phase expansion. [0003] The traditional algorithm assumes that the wrapped phase signal is x w (n), the unfolded phase is x u (n): make x u (n)=x w (n); The difference of the calculated data is the first-order difference of the wrapped phase signal ΔPhase=x w (n)-x w (n-1); if the data difference ΔPhase>π, then x w (n) 2π is subtracted from the current point and all subsequent poin...

Claims

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Application Information

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IPC IPC(8): G06F7/544
CPCG06F7/544
Inventor 冯秀娟柯伟李立京何龙标牛锋杨平郑云山
Owner NAT INST OF METROLOGY CHINA
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