The invention relates to the technical field of signal processing, in particular to a phase unwrapping algorithm based on double counters, which comprises the following steps of: calculating a difference value between a front phase and a rear phase, judging whether the difference value is greater than a threshold value of phase truncation, adding 1 to a corresponding counter if the difference value is greater than the threshold value, and judging the relative size of the counter if not; subtracting the counter with the small numerical value from the counter with the large numerical value, assigning a result to the counter with the large numerical value, setting the numerical value of the counter with the small numerical value to be 0, calculating a difference value of the two counters, and performing first-step compensation on the phase. Calculating the difference between the current phase value and the rear phase value as well as the difference between the current phase value and the front phase value, comparing the difference results of the phase values with a threshold value, and if the difference results of the phase values are greater than the threshold value, subtracting two times of the threshold value from the current phase value; if the numerical difference results are all smaller than the threshold value, the current phase value is added with two times of the threshold value, otherwise, the current phase value is kept unchanged, the problems that a phase unwrapping algorithm is low in speed and high in complexity are solved, and the phase unwrapping algorithm is suitable for an FPGA platform at the same time.