Chip packaging method and chip packaging unit

Abstract

The invention discloses a chip packaging method and a chip packaging unit. The chip packaging method comprises the following steps: providing a substrate which comprises a plurality of finger-shaped contacts; a plurality of chips and a plurality of vertical heat conduction structures surrounding the chips are arranged on the substrate, the chips are arranged on the substrate in a flip chip mode, and the vertical heat conduction structures make contact with the corresponding finger-shaped contacts respectively; providing a packaging material for packaging the substrate, the chip and the vertical heat conduction structure; adhering a metal film on the packaging material through an adhesion layer to form a packaging structure; and cutting the packaging structure to form a plurality of chip packaging units, and each chip packaging unit comprises each chip, a plurality of corresponding vertical heat conduction structures surrounding each chip, a cut substrate and a cut metal film.

Description

technical field [0001] The invention relates to a chip packaging method, in particular to a chip packaging method in which a plurality of vertical heat-conducting structures surrounding each chip are thermally connected to a substrate and a metal film respectively during the packaging process. Background technique [0002] In the prior art, refer to figure 1 , which shows the chip package structure of US Pat. No. 9,984,992, which includes two chips, and the lower chip CH is disposed on the substrate 110 and is located in a Faraday cage surrounded by a plurality of bonding wires 100 and other chips. An internal electromagnetic protection structure is formed. The wire rod 100 is disposed on the base material 110 , is connected to the circuit in the base material 110 , and is covered by the packaging material 120 , which is designed to prevent electromagnetic interference. According to the drawings, the heat dissipation of the chip CH is mainly through the substrate 110 downw...

AI Technical Summary

Problems solved by technology

Among them, the shape of the metal cover 140 is complicated, and its processing is difficult. How to correctly place the metal cover 140 in the positioning step to achieve the best thermal contact with the chip CH is another technical problem.

In addition, due to the limitation of manufacturing technology, the metal cover 140 has a lower limit of size, and cannot be used for small-sized chip packaging units.

Images