Burst mode type semiconductor memory device
A storage device and pulse train technology, applied in pulse technology, information storage, static memory, etc., can solve problems such as increased power consumption
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[0034] Before describing the preferred embodiment of the present invention, a prior art semiconductor memory device will be described with reference to FIGS. 1, 2, 3A, 3B, 4A, 4B, 5, 6, and 7.
[0035] FIG. 1 illustrates a first prior art semiconductor memory device, and reference numeral 101 denotes a memory cell array. In addition, an address buffer / decoder 1021 is provided. Furthermore, an input-output buffer 1031 , an input-output memory circuit 1032 , an input-output buffer 1041 and an input-output memory circuit 1042 are provided. Furthermore, buffers 1051 and 1061 for control signals and memory circuits 1052, 1062 for control signals are also provided.
[0036] The clock signal CK is supplied from the pad 1701 to the memory circuits 1052 and 1062 through the inverters 1072 and 1073 . Clock signal CK is supplied from pad 1701 to memory circuits 1042 (1032) and 1022 through inverters 1074 (1074') and 1075 (1075').
[0037] A memory circuit and a buffer of the apparatus...
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