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Repair fuse circuit performing complete latch operation using flash memory cell

A fast storage, circuit technology, applied in static memory, read-only memory, digital memory information and other directions, can solve problems such as unstable voltage, false latch, abnormal output, etc.

Inactive Publication Date: 2004-07-28
HYUNDAI ELECTRONICS IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, in the conventional repair fuse initialization circuit as described above, if the latch is assumed to be reversed during the initialization process when the voltage is low, a phenomenon that repair has been performed will appear regardless of whether repair has not yet been performed.
That is, when the fuse circuit is initialized and repaired under the condition of low voltage, due to the unstable voltage in the initialization stage, false latching may sometimes occur. At this time, the result of false latching does not change even if VCC is ideal. , so there is a problem of producing abnormal output

Method used

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  • Repair fuse circuit performing complete latch operation using flash memory cell
  • Repair fuse circuit performing complete latch operation using flash memory cell
  • Repair fuse circuit performing complete latch operation using flash memory cell

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Embodiment Construction

[0020] Next, preferred embodiments of the present invention will be described in detail.

[0021] First of all, the core technical measure of the present invention is that, in order to eliminate the erroneous output caused by false latching under low voltage, when the repair fuse circuit is initialized, the voltage value rises to the set voltage state. initialization. With such a technical measure, even if false latching occurs at a low voltage, it can be controlled so as to re-initialize the repair fuse circuit and perform normal latching.

[0022] FIG. 2A is a circuit diagram of a repair fuse initialization circuit using a fast memory cell and a cross-coupled latch structure according to an embodiment of the present invention, Figure 2B is its timing diagram. Figure 3A is the low pulse generating circuit, Figure 3B is its timing diagram.

[0023] First, referring to Figure 2A, the present embodiment and the above-mentioned Figure 1A The difference of the existing cir...

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Abstract

The invention provides a repair fuse initialization circuit by using speediness storage unit, initializing the repair fuse circuit via the voltage is under the setting voltage state, so as to remove the error flip-latch under low voltage.

Description

technical field [0001] The present invention relates to a repair fuse circuit in a flash memory unit, and more particularly, to a repair fuse circuit using a flash memory unit for stable initialization work. Background technique [0002] In general, although existing repair circuits for typical flash memory cells use a cross-latch structure, this method naturally performs cross-latch while applying a voltage. [0003] that is, Figure 1A As shown, the existing repair circuit includes 2 P-type MOS transistors MP1, MP2, 2 fast cells FC1, FC2, N-type MOS transistor MN1 and inverter INT1. [0004] refer to Figure 1A The sources of the P-type MOS transistors MP1 and MP2 are connected to the supply voltage VCC, the drain of the P-type MOS transistor MP1 is connected to the drain of the fast cell FC1, and the drain of the P-type MOS transistor MP2 is connected to the fast cell FC2. The drains are connected, and the voltage is applied to the respective drains of the two fast cells...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/04G11C16/00G11C16/04G11C29/00H03K3/356
CPCH03K3/356008G11C29/789G11C16/0441G11C16/00
Inventor 金承德
Owner HYUNDAI ELECTRONICS IND CO LTD