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Chip package and its making process

A technology for chip packaging and manufacturing methods, which is applied in the manufacture of semiconductor/solid state devices, printed circuits connected with non-printed electrical components, electrical components, etc., and can solve problems such as size limitations

Inactive Publication Date: 2005-06-15
SAMSUNG ELECTRO MECHANICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the size of the substrate is limited in terms of miniaturized packaging

Method used

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  • Chip package and its making process
  • Chip package and its making process
  • Chip package and its making process

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0030] image 3 is a perspective view of a chip package according to an embodiment of the present invention.

[0031] refer to image 3 , the package 40 includes a chip 35 and a substrate 31 formed on a lower surface of the chip 35 . Chip 35 includes first terminals (not shown) formed on the upper surface and second terminals (not shown) formed on the lower surface. Usually the first terminal and the second terminal are opposite to each other. The upper conductive layer 35a is formed on the upper surface of the chip 35 having the first terminal and the lower conductive layer 35b is formed on the lower surface of the chip 35 having the second terminal.

[0032] A chip 35 is attached to the upper surface of the substrate 31 . Conductive vias 33 are formed on the substrate 31 . The lower conductive layer 35 b formed on the lower surface of the chip 35 is electrically connected to external devices through the conductive via 33 of the substrate 31 . The lower conductive layer...

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PUM

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Abstract

The chip package includes a chip having a first surface with a first terminal and a second surface with at least one second terminal, the second surface is opposite to the first surface, and a first conductive electrode is formed on the first surface of the chip. layer, a second conductive layer is formed on the second surface of the chip, and the chip package further includes a substrate attached to the second surface of the chip and including at least one conductive via connected to a second terminal of the chip. And the present invention provides a chip package assembly part including the chip package. In addition, a method of manufacturing a chip package and an assembled part including the chip package is provided. Chip packaging eliminates the use of bond wires and additional conductive pads, thereby reducing the size of the package and simplifying the manufacturing process.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, and more particularly to a chip package and a method of manufacturing the chip package by forming a conductive layer on both surfaces of the chip and attaching a substrate with conductive vias to these surfaces The one that comes up makes the chip package miniaturized and easier to manufacture. Background technique [0002] As known to those skilled in the art, semiconductor components such as diodes or transistors are packaged and these packaged components are then mounted on a printed circuit board. Structurally, the package easily connects terminals of the semiconductor to corresponding signal patterns of the printed circuit board and serves to protect the semiconductor chip from external stress, thereby improving the stability of the package. [0003] To meet the recent trend of miniaturization of semiconductor products, semiconductor chip packages have also been miniaturiz...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/48H01L23/28H01L23/12H01L21/50H01L21/60H01L23/02H05K1/18H01L21/48H01L23/31H01L23/492H01L23/498
CPCH01L23/3121H01L23/4922H01L23/49827H01L2224/4848H01L2224/85051H01L24/48H01L2924/00015H01L2924/181H01L2924/00014H01L2224/48465H01L2224/05599H01L2224/85399H01L2224/45099H01L2924/00012H01L2224/45015H01L2924/207H01L21/48
Inventor 安纹锋吴邦元赵珖喆
Owner SAMSUNG ELECTRO MECHANICS CO LTD