Method for multiple CPU communication

Abstract

The multiple-CPU communication method includes the following steps: to set hung memory spaces connected to CPU for mutual access, for the CPU in the sending party to write data message to be sent into the memory space connected to the CPU in the receiving party, to set register for generating interruption signal to receiving party CPU, and for the receiving party CPU to receive the data message after accepting the interruption signal; for the CPU in the sending party to write control message to be sent into the buffering area of the intelligent I / O unit, to create interruption signal of intelligent I / O unit transmitted to receiving party CPU, and for the receiving party CPU to receive the control message from the buffering area of the intelligent I / O unit after accepting the interruption signal. The present invention transmits data via different interruptions and passages, solves the safety problem of transmitting important data and raises data transmitting speed.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a multi-CPU communication method. Background technique [0002] With the development of computer and communication technology, a single CPU can no longer meet people's needs, and multi-CPU technology has emerged as the times require. [0003] figure 1 Shown is a master-slave multi-CPU structure. A general-purpose processor with powerful computing capabilities is used as the main CPU, and a CPU with powerful communication control functions and data forwarding capabilities such as a communication controller or network processor is used as an ordinary PCI on the interface component interconnection (PCI: Peripheral Component Interconnection) bus. The device completes the function of communication with the outside world or data forwarding. In this way, a single board has powerful computing capability and fast data forwarding capability at the same time. This structure is call...

AI Technical Summary

Problems solved by technology

[0011] There are a lot of data transmitted between CPUs, and the priority and importance of various data are different. Some data packets are allowed to be discarded, and once some data packets are discarded, the system will work abnormally.

In the above-mentioned prior art solutions, no matter it is an ordinary data message or an important control message, all data packets are transmitted through the same channel and in the same way, and the reliability of important data cannot be guaranteed

[0012] For each queue, the writing of data is random, while the reading of data is timed, and the problem of access conflict is difficult to completely avoid and solve

[0013] Because the queue is managed by receiving pointers and sending pointers, and the master and slave CPUs have a set of software codes for maintaining pointers, the complexity of software design is increased.

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