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Circularly addressing method and system with effective memory

A technology of memory address and generating device, which is applied in the field of memory addressing and can solve problems such as inefficiency of memory

Inactive Publication Date: 2007-05-09
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the memory usage is inefficient because of the constrained setting of the usable bounds

Method used

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  • Circularly addressing method and system with effective memory
  • Circularly addressing method and system with effective memory
  • Circularly addressing method and system with effective memory

Examples

Experimental program
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Embodiment Construction

[0065] The proposed embodiment of the present invention will be described in detail with reference to FIGS. 1-6 .

[0066] In FIG. 1, a simplified diagram of an integrated circuit processor includes an address generator for use in the present invention. The integrated circuit device 10 includes a program memory 11 , a data memory 14 , and a processor core 12 . Such a processor core 12 includes a loop address generator 15 for data memory access, a register set (Registerfile) 13 containing parameters defining a loop area, and components such as an instruction decoder, an arithmetic logic unit (ALU), etc. other logic. The circular address generator 15 according to the present invention can be used to manage the area (Buffer) in the data memory 14, which has a length (L+1) and an optional boundary base, which can be based on the hidden upper boundary, or can be based on The combination of the hidden upper boundary and the hidden lower boundary is used as the benchmark.

[0067]...

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PUM

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Abstract

The address generating unit for the circular area in memory has the upper boundary of the circular area implied in the current address. The double-mode address generator has several inputs for receiving current address A, address offset M, area length L and control signal; and destination address generating logics, which calculates based on A, L and M the first memory address in the circular area with the hidden lower boundary as reference and the second address in the circular area with the hidden upper boundary as reference. One of the two is selected by the control signal as final output. The first memory address generated via adding A and M is used for first circular area with hidden lower boundary X and from X to X+L; while the second memory address generated via adding A and M is used for the hidden upper boundary Y and from Y to Y-L.

Description

technical field [0001] The present invention relates to a memory addressing, and in particular to an addressing of a circulation area for a digital system such as a digital signal processor. Background technique [0002] Circular Addressing, also known as modulo addressing, is commonly used in digital signal processing and other data processing applications. In the area (Buffer) that uses circular addressing, it is necessary to set its address distribution range first. In generating addresses for loop regions, the target address is generated by adding an offset value to the current address. If the address pointed to by the sum of the current address and the offset value exceeds the specified address range, the target address will wrap around to the opposite side of the loop area. [0003] There are several methods for generating cyclic area addressing, which are known in the art. A common way to achieve circular addressing is to define two clear parameters that set the up...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/08G06F12/1081
Inventor 邹宏基
Owner MACRONIX INT CO LTD