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Virtual linkage combination time gap regulating method

A technology of virtual concatenation group and virtual concatenation, applied in the direction of digital transmission system, data exchange network, electrical components, etc., can solve the problems of reducing configuration flexibility, increasing cross-board time division pressure, service interruption, etc., and speeding up software development Time, reduce time-sharing pressure, reduce the effect of risk

Inactive Publication Date: 2007-06-27
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the previous processing method, this time slot adjustment is completed on the cross-connect board, which will not only increase the time-division pressure of the cross-connect board, but also cause service interruption when reconfiguring the time slot, and reduce the flexibility of configuration.

Method used

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  • Virtual linkage combination time gap regulating method
  • Virtual linkage combination time gap regulating method
  • Virtual linkage combination time gap regulating method

Examples

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Embodiment Construction

[0020] Fig. 1 is a hardware connection diagram of time slot adjustment in the present invention. An N×N cross-connect matrix is ​​added in the uplink where the data service is mapped to the SDH direction, and an N×N cross-connect matrix is ​​added in the downlink in the demapping direction of the SDH direction.

[0021] Figure 2 and Figure 3 together constitute the time slot adjustment process of the present invention. Among them, FIG. 2 describes the initialization configuration process of time slot adjustment; FIG. 3 describes the time slot configuration process. This has been described in detail in the technical solution section, and will not be repeated here.

[0022] Fig. 4 is a hardware connection diagram of an embodiment of the present invention. The time slot adjustment of the present invention will be specifically described below with reference to FIG. 4 .

[0023] Assume that the virtual cascade processing module can handle 126 VC12s, which correspond to two VC4 b...

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Abstract

A method for regulating the time slot in Virtual Concatenation Group (VCP) includes following steps: separately adding a cross-interaction matrix in the up stream of SDH mapping path and the down stream of de -mapping path to use to make VC time slot regulation; replaces each VC 12 of the VC with Virtual Tributaries (VT). According to the time slot sequence required by VC configures the VC4 bus corresponding to each VT and sequence number of VC4; initializes the cross-interaction matrix; makes the time slot configuration and time slot regulation to VCP. The invention reduces the time division pressure, and also reduces the risk caused by amending time slot algorithm.

Description

technical field [0001] The invention relates to a processing method for a virtual concatenation group time slot of a Synchronous Digital Hierarchy (SDH: Synchronous Digital Hierarchy) optical transmission device. Background technique [0002] In recent years, SDH-based Multi-Service Transport Platform (MSTP: Multi-Service Transport Platform) technology has been widely used in metropolitan area networks. The core idea of ​​this technology is to use VC virtual concatenation to transmit data services. VC refers to a virtual container, which is a technical term in SDH. VC4 and VC12 represent virtual containers of different granularities. VC4 is a 140M virtual container, and VC12 is a 2M virtual container. Because different data services have different bandwidth requirements, for SDH, the service bandwidth carried by each virtual container is limited. For example, VC12 is a 2M virtual container, and VC4 counts a 140M virtual container. However, the bandwidth requirements of act...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/26H04L12/24H04L12/28H04Q3/00H04Q3/52
Inventor 邓兵
Owner ZTE CORP
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