Semiconductor device and its manufacturing method

Abstract

The present invention provides a DRAM in which junction leak is suppressed without increasing capacity of a capacitor and a contact area between a diffusion layer and a take-out electrode is increased to decrease contact resistance between them, whereby small-sizing of the DRAM cell can be achieved and an insulating withstand voltage across a gate electrode and the take-out electrode can be secured. In a semiconductor device having a memory element and a logic element formed on the same semiconductor substrate, a transistor of the memory element comprises a gate electrode (16) embedded within a trench (13) formed in a semiconductor substrate (11) through a gate insulating film (15) and a diffusion layer (17) formed on the side of the semiconductor substrate (11) at a side wall of the trench (13), and a take-out electrode (20) connected to the diffusion layer (17) is provided so that the take-out electrode overlaps the gate electrode (16) through a first interlayer insulating film (insulating film) (18) on the gate electrode (16). A word line (16) is also provided in the trench (13) and an impurity concentration of the diffusion layer (17) is decreased as a depth thereof is increased.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the device; more particularly, to a semiconductor device in which DRAM (Dynamic Random Access Memory) and logic elements are mixedly manufactured on the device and a method of manufacturing the device. Background technique [0002] Semiconductor manufacturers compete each year to rapidly develop micro-manufacturing processes. The manufacture of semiconductor devices strives to develop a complex device whose DRAM has a large capacity, and logic elements that can be driven at high speed, both of which are fabricated on one chip. As an example of such a device, gates of memory cells of a DRAM are arranged on a substrate such that the gates are stacked on top of each other. In order to remove the diffusion layer of the memory cell transistors, so-called self-alignment contacts are introduced, while logic components do not use self-alignment contacts. [0003] However, i...

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Problems solved by technology

Therefore, the manufacturing process of the above-mentioned replacement gate makes the matching properties with the stacked DRAM cells unsatisfactory

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