Unlock instant, AI-driven research and patent intelligence for your innovation.

Solid-state imaging device and correlated double sampling circuit

A solid-state imaging device and circuit technology, applied in the field of solid-state imaging devices and systems, MOS type solid-state imaging devices, and related double sampling circuits, can solve problems such as difficult miniaturization, achieve miniaturization, simplify configuration, and suppress fixed modes Effects of Noise and Reset Noise

Inactive Publication Date: 2004-01-07
酒井康江
View PDF0 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the existence of the S / H circuit has become one of the main reasons for the difficulty in miniaturization at present when the circuit scale of the MOS type solid-state imaging device is expected to be further reduced.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Solid-state imaging device and correlated double sampling circuit
  • Solid-state imaging device and correlated double sampling circuit
  • Solid-state imaging device and correlated double sampling circuit

Examples

Experimental program
Comparison scheme
Effect test

no. 1 approach

[0043] Figure 5 It is a diagram showing a partial configuration example of the MOS solid-state imaging device 10 according to the first embodiment.

[0044] Such as Figure 5 As shown, each pixel 1 arranged two-dimensionally has a photodiode 2 which is a photoelectric conversion element, a vertical scanning transistor 3 , a horizontal scanning transistor 4 , and a reset transistor 5 . Further, while the vertical scanning transistor 3 is connected in series to the photodiode 2 , the horizontal scanning transistor and reset transistor 5 connected in parallel as one set are connected in series to the vertical scanning transistor 3 .

[0045] That is, the gate of the vertical scanning transistor 3 is connected to the vertical scanning line 6 , the source is connected to the photodiode 2 , and the drain is connected to the common node of the horizontal scanning transistor 4 and the reset transistor 5 . The gate of the horizontal scanning transistor 4 is connected to the horizont...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A CDS circuit (20) is provided with a clamping circuit (21,22) for clamping the output signal of a solid-state imaging device to a signal potential and an S / H circuit (24, 25) for sampling the differential potential between the clamped signal potential and a reference potential. The output signal is clamped to the signal potential by applying a first clamping pulse CP1 before the accumulated charge reset of the solid-state imaging device and applying a second clamping pulse CP2 after the accumulated charge reset so as to sample and hold the differential potential. Thus, the CDS circuit (20) can perform a clamping and a sample-and-hold operation along the stream (stream of time) of the signal outputted from the solid-state imaging device. As a result it is unnecessary to provide any S / H circuit for delaying the signal potential by a predetermined time in the solid-state imaging device.

Description

technical field [0001] The present invention relates to a solid-state imaging device and system, and related double-sampling circuits, in particular to an X-Y address type MOS solid-state imaging device and related double-sampling circuits suitable for its accompanying use. Background technique [0002] In general, various types of solid-state imaging devices can be classified into CCD transfer type that uses CCD (Charge Coupled Device) for pixel selection and charge reading in two-dimensional array, and X-Y address type that uses X-Y selection network. However, most solid-state imaging devices of the X-Y address type are configured using MOS transistors. [0003] The MOS type solid-state imaging device consumes less power than the CCD type solid-state imaging device, and has the advantage of being easy to miniaturize. Therefore, although the image quality is not as good as that of a CCD-type solid-state imaging device, it is attracting attention to be used for small inform...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H04N5/335H04N5/357H04N5/363H04N5/374H04N5/378
CPCH04N5/363H04N5/378H04N5/3575H04N25/616H04N25/65H04N25/78H04N25/75
Inventor 小柳裕喜生
Owner 酒井康江