Semiconductor memory device

Abstract

The present invention has a configuration with which the data '0' and the data '1' can be arbitrarily written to a reference cell capacitor for generating a reference potential, and comprises a non-volatile capacitor for storing the data to be written. This configuration makes the fine adjustment of the reference potential possible without a mask correction, which improves yield. The present invention also comprises a means of rewriting only the reference capacitors. By this configuration, the dispersion of the reference potential can be controlled, and yield is improved.

Description

technical field [0001] The invention relates to a nonvolatile memory device, in particular to a generation technology of a reference potential in the readout operation of a 1T1C type ferroelectric memory (FRAM (Ferroelectric Randon Access Memory) ferroelectric random access memory). Background technique [0002] FIG. 11 shows the configuration of a conventional 1T1C (one transistor and one capacitor) type ferroelectric memory. [0003] The figure shows a memory cell array composed of 1 row, 2n columns and 1 I / O, where n can take any integer. [0004] 1001-1008 are 1T1C type ferroelectric storage units. 1011 to 1014 denote sense amplifiers for amplifying the potential difference between the complementary bit lines BLt[2n+1:0] and BLb[2n+1:0]. Cb is the parasitic capacitance of the bit line. 1021-1024 are reference units for generating reference potentials. 1031 is a reference potential adjuster for adjusting the reference potential. [0005] Also, BLt[2n+1:0] represents ...

AI Technical Summary

Problems solved by technology

In this way, there is a problem that the most important reference potential in the operation of 1T1C cannot be fine-tuned, and the yield is difficult to improve

In addition, due to the increase in the reference potential error after memory, there are also problems in the memory of ferroelectric memory.

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