Zero greeve controller with universal series bus interface

A universal serial bus and zero-slot controller technology, applied in the field of zero-slot controllers, can solve the problems of low interface circuit performance and restricted VXI bus performance, etc.

Inactive Publication Date: 2005-10-26
HARBIN INST OF TECH
View PDF0 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a kind of zero-slot controller with universal serial bus interface, to overcome the interface circuit performance of external controller and zero-slot controller in existing zero-slot controller is low, restricts VXI bus performance to play Defects

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Zero greeve controller with universal series bus interface
  • Zero greeve controller with universal series bus interface
  • Zero greeve controller with universal series bus interface

Examples

Experimental program
Comparison scheme
Effect test

specific Embodiment approach 1

[0005] Specific implementation mode one: the following combination figure 1 This embodiment will be specifically described. It consists of a zero-slot CPU circuit 1, a zero-slot base plate 2, an ISA / USB control signal conversion circuit 5 and a USB interface chip 6, and the zero-slot CPU circuit 1 is connected to the No. 1 ISA bus slot 2-1 on the zero-slot base plate 2 In order to realize the signal communication with the zero-slot base plate 2, the signal exchange follows the ISA bus protocol, and a communication terminal of the ISA / USB control signal conversion circuit 5 is connected to the No. 2 ISA bus slot 2-2 on the zero-slot base plate 2 Realize the exchange of bidirectional signals with the zero slot base plate 2, the other communication end of the ISA / USB control signal conversion circuit 5 is connected on a communication end of the USB interface chip 6 to realize the conversion of the address signal and the control signal, and the other communication end of the USB i...

specific Embodiment approach 2

[0006] Specific embodiment two: below in conjunction with Fig. 2 and image 3 This embodiment will be specifically described. The difference between this embodiment and Embodiment 1 is: the USB interface chip 6 selects the chip ISP1581, and the pin 5 and pin 6 of the USB interface chip 6 respectively receive the data and signals transmitted by the external controller through the USB cable and send data to the outside and signal. The ISA / USB control signal conversion circuit 5 is made up of a programmable logic chip 5-1 and a dial switch 5-2. The model of the programmable logic chip 5-1 is EPM7128STC100-10, which is manufactured by Altera Corporation. The dial switch 5- 2 consists of eight-position resistor row SWR and eight-position switch SW1, pin 1 of eight-position resistor row SWR is connected to power supply VCC, pin 2 of eight-position resistor row SWR is connected to pin 9 of eight-position switch SW1 and programmable logic chip 5-1 The pin 60 of the eight-bit resisto...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a zero socket controller in VXI bus testing system, provided with universal bus interface and composed of zero socket CPU circuit, zero socket bottom board, ISA / USB control signal converting circuit and USB interface chip, where the zero socket CPU circuit is connected with an ISA bus No.1 socket to implement signal interchange with the zero socket bottom board, a communication port of the converting circuit is connected with an ISA bus No.2 socket on the zero socket bottom board and the other one is connected with that of the USB interface chip, the other communication port of the USB interface chip is connected with the other port of the ISA bus No.2 socket to implement the transmission of interrupt request signal, and the converting circuit is implemented by a PLD, i.e. EPLD. The invention adopts standard interface USB to directly connect with the zero socket controller of the VXI system, solving the speed bottleneck problem of the interface between the zero socket controller and an external controller.

Description

Technical field: [0001] The invention relates to a zero-slot controller in a VXI bus test system. Background technique: [0002] As a new generation of instrument interface bus, VXI (VMEbus eXtensions for Instrumentation, that is, the extension of VMEbus in the instrument field) marks that the measurement and instrumentation system is entering a new stage. The system controller is the control core of the VXI bus system, and its interface with various instruments and equipment has a great influence on the performance of the test system. Usually according to the controller's interface mode, the VXI bus test system is divided into two types: external controller system and embedded computer test system. When using an external controller VXI system, a zero-slot controller module must be inserted into the VXI chassis. The existing zero-slot controller module is equipped with IEEE488 bus interface, IEEE1394 bus interface or MXI bus (multi-chassis expansion bus) interface, etc. to...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38
Inventor 付平黄灿杰刘兆庆孟升卫
Owner HARBIN INST OF TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products