Unlock instant, AI-driven research and patent intelligence for your innovation.

One-time programmable memory device

A storage device and programming device technology, which is applied in the field of one-time programmable storage devices, can solve problems such as transistor damage, and achieve the effect of low cost and low selection

Inactive Publication Date: 2006-01-18
艾普契科技有限公司
View PDF1 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the disadvantage of this solution is that the transistor itself can be damaged in snapback mode

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • One-time programmable memory device
  • One-time programmable memory device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] figure 1 An OTP memory cell forming part of a CMOS memory device according to the invention is shown. The memory cell includes a selection transistor T1 and a storage transistor T2. Both transistors T1 and T2 are NMOS transistors. The drain of the selection transistor T1 is connected to the bit line BL, and the gate of the selection transistor T1 is connected to a voltage source (not shown) supplying a voltage Vsel. The source of the selection transistor T1 is connected to the drain of the storage transistor T2, and the source of the storage transistor T2 is connected to the ground Gnd. The gate of the storage transistor T2 is connected to a voltage source (not shown) that provides a voltage Vctrl.

[0024] In the unprogrammed state of the memory cell, the drain junction of the storage transistor T2 is undamaged, while in the programmed state of the memory cell, the drain junction of the storage transistor T2 is thermally damaged.

[0025] To program the memory cell...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a one-time programmable memory device. In order to make such a memory device particular simple and reliable, it is proposed that the device comprises a MOS selection transistor T1 and a MOS memory transistor T2 connected in series between a voltage supply line BL and ground Gnd. The device further comprises programming means for applying predetermined voltages Vsel, Vctrl, Vprog to the gate of the selection transistor T1 , to the gate of the memory transistor T2 and to the voltage supply line BL. The applied voltages Vsel, Vctrl, Vprog are selected such that they force the memory transistor T2 into a snap-back mode resulting in a current thermally damaging the drain junction of the memory transistor T2 . The invention relates equally to a corresponding method for programming a one time programmable memory.

Description

technical field [0001] The present invention relates to one-time programmable (OTP) memory devices and to methods for programming one-time programmable memory devices. Background technique [0002] OTP memory constitutes a non-volatile storage element that retains information even when power is removed. The structure of conventional OTP memory is different from that used in conventional CMOS (Complementary Metal Oxide Semiconductor) technology. Thus, conventional OTP memories require modifications or costly additional processing steps in wafer fabrication when integrated with CMOS circuits. [0003] In document US5943264 a solution for realizing OTP memory devices in standard CMOS technology is disclosed. Here, an NMOS (N-channel Metal Oxide Semiconductor) transistor is connected in series with a PN junction that functions as a memory. By melting the PN junction, the memory is programmed. For this, the transistor is put into a so-called snap-back mode, which is achieved ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G11C17/16G11C17/18
CPCG11C17/18G11C17/16
Inventor J·C·赖纳
Owner 艾普契科技有限公司
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com