Method for operating semiconductor device and semiconductor device

Abstract

In one exemplary embodiment, the fast circuit path includes a chain of inverters controllably operated in a slow, low subthreshold leakage current mode or a fast, high subthreshold leakage current mode depending on the operating mode of the semiconductor device. The non-fast circuit path includes a chain of inverters operating in a reduced subthreshold leakage current mode independent of the operating mode of the semiconductor device.

Description

[0001] This application claims the benefit of Korean Patent Application No. 2004-58589 filed on July 27, 2004 and Korean Patent Application No. 2004-69786 filed on September 2, 2004, the contents of which are incorporated herein by reference. technical field [0002] The present application relates to methods of operating semiconductor devices and semiconductor devices, and more particularly, to integrated semiconductor devices and methods of operating that prevent sub-threshold leakage currents in a smarter manner. Background technique [0003] In typical integrated semiconductor devices such as DRAM and SRAM, it is desirable to increase the degree of integration while reducing the supply voltage. To accomplish this, the threshold voltage (eg, gate-source voltage) that turns on a large number of MOS transistors included in the integrated circuit device has been reduced. However, the reduction of the threshold voltage of the MOS transistor corresponding to the power supply v...

AI Technical Summary

Problems solved by technology

[0004] This leakage current problem is significant for CMOS inverter chains included in integrated semiconductor devices

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