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Method of fabricating PCB in parallel manner

A technology of circuit layer and via hole, which is applied in the direction of printed circuit manufacturing, multilayer circuit manufacturing, and electrical connection formation of printed components, etc. It can solve the problems of high impedance of insulating layer, prolonging MLB manufacturing time, increasing manufacturing cost, etc.

Inactive Publication Date: 2006-02-08
SAMSUNG ELECTRO MECHANICS CO LTD
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0035] The disadvantage of the conventional build-in method is that when the number of layers constituting the MLB increases, the formation of via holes using laser beams, lamination of layers, plating, inspection, and surface treatment are repeated sequentially, thereby prolonging the manufacturing time of the MLB, And it is difficult to inspect the MLB during the desired MLB manufacturing, thus undesirably increasing the defective ratio of the MLB, resulting in an increase in the manufacturing cost of the MLB
[0036] In addition, the conventional method in which vias are formed in the circuit layer of the MLB to obtain interlayer electrical connections, the walls of the vias are plated with copper, and the vias are plugged with paste to protect the copper cladding on the vias is disadvantageous in that : After plating the walls of the via hole with copper, a via hole plugging process with paste is additionally performed
[0037] Also, the impedance of the insulating layer of the dielectric resin constituting the MLB is higher than that of the circuit layer, and this impedance affects the operation of the circuit

Method used

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  • Method of fabricating PCB in parallel manner
  • Method of fabricating PCB in parallel manner
  • Method of fabricating PCB in parallel manner

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Embodiment Construction

[0056] Hereinafter, with reference to the accompanying drawings, a detailed description of the present invention will be given.

[0057] Image 6 Illustrates the fabrication of multi-layer PCBs in a parallel manner according to the present invention. The circuit layers 507a, 507b with the insulating layer adhered thereto and the circuit layer 507c without the insulating layer are formed in parallel according to the separation process, arranged as Image 6 , and press in the direction of the shoulders to form a Figure 7 The six-layer PCB shown in .

[0058] Different processes for forming circuit layers in parallel according to the present invention will be described.

[0059] 2a to 2e illustrate an embodiment of a manufacturing method for constructing circuit layers of a multilayer PCB, which method is used in a method for manufacturing a multilayer PCB in parallel according to the invention.

[0060] Referring to FIG. 2 a , a typical copper clad laminate and copper foil ...

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Abstract

Disclosed is a method of fabricating a multilayer PCB (MLB). More particularly, the present invention relates to a method of fabricating a multilayer PCB, in which plural circuit layers having insulating layers attached thereto and another circuit layer having no insulating layer are formed in a parallel manner according to separate processes, and laminated at one time, unlike fabrication of the multilayer PCB adopting a conventional build-up manner.

Description

technical field [0001] The invention relates to a method of manufacturing a multilayer printed circuit board (MLB: multilayer PCB). More specifically, the present invention relates to a method of manufacturing a multilayer PCB in which a plurality of circuit layers having insulating layers adhered thereto are formed in parallel according to a separation process and laminated simultaneously, unlike conventional build-up methods The multilayer PCB manufacturing is different. Background technique [0002] Due to the trend toward small, thin, highly integrated, and packaged portable electronic products, multilayer PCBs that achieve fine patterning, small size, and packaging are being developed. Therefore, the substances used to make up the multilayer PCB are being replaced, and the number of layers that make up the multilayer PCB is increased to facilitate the formation of fine patterns on the multilayer PCB, so as to ensure the reliability of the multilayer PCB and improve the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K3/46H05K3/42H05K3/22
CPCH05K3/462H05K2201/0959H05K2201/09536H05K2203/0191H05K3/4623H05K3/0035H05K3/4069H05K2201/096Y10T29/49165H05K3/46
Inventor 睦智秀宣炳国宋昌奎朴俊炯孟德永金泰勋
Owner SAMSUNG ELECTRO MECHANICS CO LTD