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Printing routing basal lamina and semiconductor testing device

A technology for printed wiring substrates and test devices, applied in the direction of single semiconductor device testing, semiconductor/solid-state device testing/measurement, printed circuits, etc.

Inactive Publication Date: 2010-12-08
JAPAN ENG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, between the contact layer 1050 and the ground wiring layers 1010, 1010, and between the contact layer 1050 and the power wiring layers 1030, 1030, electrostatic capacitances are generated.
If the electrostatic capacitance is increased, the change of the signal waveform in the signal wiring layer 1020 becomes slow, and there arises a problem that it takes time to rise or fall the waveform.
That is, ideal waveforms cannot be transmitted and received from the signal wiring layer 1020 through the via hole 1040.

Method used

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  • Printing routing basal lamina and semiconductor testing device
  • Printing routing basal lamina and semiconductor testing device
  • Printing routing basal lamina and semiconductor testing device

Examples

Experimental program
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Embodiment Construction

[0038] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the embodiment described below does not limit the technical scope of the present invention.

[0039] figure 2 It is a front view of the whole reinforcement test apparatus which concerns on one Embodiment of this invention, image 3 Yes figure 2 An overall side view of the reinforced test rig shown.

[0040] such as these figure 2 and image 3As shown, the container 20 serving as the inner chamber of the reinforcement test apparatus 10 according to the present embodiment is partitioned by a heat insulating pipe wall or the like, and a plurality of reinforcement test panels BIB can be accommodated. In the example of this embodiment, the slots 30 for supporting the reinforced test board BIB are arranged in 16 stages and 2 rows, and a total of 32 pieces of the reinforced test board BIB can be accommodated in the container 20 . However, the n...

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PUM

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Abstract

Disclosed is a printed-wiring board which comprises: a first wiring layer formed by a first distance separated with a through hole; a second wiring layer formed by a second distance smaller than the first distance separated with the through hole; a contacting layer electrically connected with the connection pin inserted in the through hole; a third wiring layer electrically connected with the contact layer; a fourth wiring layer formed by a third distance separated by the through hole; and a fifth wiring layer formed by a fourth distance bigger than the third distance separated by the throughhole.

Description

technical field [0001] The present invention relates to a printed wiring board and a semiconductor testing device, and more particularly to a printed wiring board having a multilayer wiring layer and a semiconductor testing device using such a printed wiring board for a burn-in board. Background technique [0002] A strengthening test device is known as a device for performing a strengthening test which is a type of screening test for surfaceizing initial defects of devices such as electronic parts and removing initial defective products. In this burn-in test device, a burn-in test board mounted with a plurality of electronic components serving as devices under test (DUT: Device Under Test) is accommodated in a burn-in chamber, and electrical stress is applied by applying a predetermined voltage. (stress), and heat and strengthen the air in the test container to impart thermal stress at a predetermined temperature, thereby making the initial defects surface. [0003] In su...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K1/00H01L21/66G01R31/26
CPCH05K1/0231H05K1/115H05K3/303
Inventor 内山秀二佐藤聪郁
Owner JAPAN ENG