Memory system having feature boosting and operating method thereof

Active Publication Date: 2018-12-25
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0008]Embodiments of the present disclosure are directed to a semiconductor memory system and an

Problems solved by technology

Electrical or magnetic interference inside the computer system can cause a single bit of memory cells of the memory system to spontaneously flip to the opposite state to cause errors and result in internal data corruption.
Bit errors of a memory system can be caused by deg

Method used

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  • Memory system having feature boosting and operating method thereof
  • Memory system having feature boosting and operating method thereof
  • Memory system having feature boosting and operating method thereof

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Embodiment Construction

[0020]Various embodiments will be described below in more detail with reference to the accompanying drawings. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. Throughout the disclosure, like reference numerals refer to like parts throughout the various figures and embodiments of the present invention.

[0021]The invention can be implemented in numerous ways, including as a process; an apparatus; a system; a composition of matter; a computer program product embodied on a computer readable storage medium; and / or a processor, such as a processor suitable for executing instructions stored on and / or provided by a memory coupled to the processor. In this specification, these implementations, or any other form that the inv...

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Abstract

A semiconductor memory system and an operating method thereof include a plurality of memory devices; and a memory controller including a feature booster and a linear predictor and coupled with the plurality of memory devices, wherein the controller is configured to collect NAND data from at least 1 data point, and model the collected NAND data with a mixture model, wherein the mixture model includes parameters and at least two latent variables modeled with different distribution modeling, the feature booster is configured to predict the parameters, and the linear predictor is configured to predict feature information.

Description

BACKGROUNDField of Invention[0001]Exemplary embodiments of the present invention relate to an apparatus of semiconductor memory storage system, and more particularly to error correction code (ECC) in NAND and an operation method thereof.Description of Related Arts[0002]The computer environment paradigm has shifted to ubiquitous computing systems that can be used anytime and anywhere. Due to this fact, the use of portable electronic devices such as mobile phones, digital cameras, and notebook computers has rapidly increased. These portable electronic devices generally use a memory system having memory devices, that is, a data storage device. The data storage device is used as a main memory device or an auxiliary memory device of the portable electronic devices. Thus, the reliability of digital data storage, such as a memory system, is critical.[0003]Data storage devices using memory devices provide excellent stability, durability, high information access speed, and low power consumpt...

Claims

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Application Information

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IPC IPC(8): G11C16/06G05B19/045G06F11/30G11C16/10G11C11/4096
CPCG11C16/107G06F11/3037G11C11/4096G05B19/045G06F11/1048G06F11/1068G11C16/0483G11C16/349G06F11/3089
Inventor KUMAR, NAVEENBHATIA, AMANXIONG, CHENRONGCAI, YUZHANG, FAN
Owner SK HYNIX INC
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