Chip package and method of making and testing the same

Abstract

A flip-chip IC package configured for ease of testing comprises a substrate and a plurality of stiffener walls, each stiffener wall carrying an IC, wherein the stiffener walls and ICs are fixed to the substrate with electrical continuity being established between the substrate and the stiffener walls and IC's through conductive bumps (solder bumps or conductive epoxy bumps). The substrate and the stiffener walls include test points on their surfaces, and also include printed electrical circuitry connecting the test points and the conductive bumps. Some of the printed electrical circuitry is arranged to establish paths between test points which facilitate testing of conductivity through the conductive bumps, and which facilitate functional testing of the ICs.

Description

[0001] 1. Field of the Invention[0002] The present invention pertains to flip-chips, and particularly to a package for flip-chips and a method of making and testing the same.[0003] 2. Description of the Related Art[0004] In recent years, new technologies which can provide high-density connections to and between integrated circuits within electronic equipment have emerged. These technologies include the assembling of multichip modules which may contain several unpackaged integrated circuit (IC) chips mounted on a single substrate.[0005] Various techniques for assembling unpackaged IC chips in a multichip module are available. These modules may be assembled by, for example, using either wire bonded connections, tape-automatic-bonded (TAB) connections, or solder flip-chip bonding, depending on the desired number and spacing of signal input-output (I / O) connections on both the chip and the substrate as well as permissible cost.[0006] In a comparison of these three techniques, wire bondi...

AI Technical Summary

Benefits of technology

[0012] Thus, the invention provides simple and inexpensive means of testing dense and complex IC packages, including verification that the solder reflow process has been effected uniformly throughout the entire package.

Problems solved by technology

A disadvantage of wire bonding is that inductance present in the wires used in connecting the chip to the substrate degrades the electrical performance of the circuitry in the multichip module.

Finally, wire bonding requires each connection between the chip and the substrate to be made one at a time and, therefore, is time consuming and therefore expensive to assemble.

This technique, however, is more expensive than wire bonding.

There is also undesirable parasitic inductance which imposes a penalty on electrical performance of the IC chip circuitry connected using this bonding technique.

It is usually necessary to test IC units after manufacture; however, the high density of IC mounting enabled by flip-chip technology compounds the complexity of testing.

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