Magnetic memory storage device

Abstract

This invention provides a probe based magnetic memory storage device. In a particular embodiment, magnetic memory cells are provided in an array. Each cell provides a magnetic data layer and a conductor. At least one movable probe having a tip characterized by a conductor and a soft reference layer is also provided. In addition, an intermediate layer joined to either the movable probe or each memory cell is provided. The movable probe may be placed in contact with a given memory cell, the probe and cell thereby forming a tunnel junction memory cell with the intermediate layer serving as the tunnel junction. The magnetic field provided by the probe conductor may be combined with a field provided by the cell conductor to produce a switching field to alter the orientation of the data layer. The memory cells may include a material wherein the coercivity is decreased upon an increase in temperature. The probe may also include a heat generator. The magnetic field provided by the probe connector will not alter the orientation of an unheated cell, but may alter the orientation of a heated cell.

Description

FIELD OF THE INVENTION [0001] This invention relates generally to ultra-high density thermally assisted magnetic memory devices, and in particular to nanotip probe based magnetic memory arrays. BACKGROUND OF THE INVENTION [0002] Today's computer systems are becoming increasingly sophisticated, permitting users to perform an ever increasing variety of computing tasks at faster and faster rates. The size of the memory and the speed at which it can be accessed bear heavily upon the overall speed of the computer system. [0003] Memory for a computer system is technically any form of electronic, magnetic or optical storage; however it is generally divided up into different categories based in part upon speed and functionality. The two general categories of computer memory are main memory and mass storage. Main memory is generally comprised of fast, expensive volatile random access memory that is connected directly to the processor by a memory buss. [0004] Mass storage devices are typicall...

AI Technical Summary

Problems solved by technology

Main memory is generally comprised of fast, expensive volatile random access memory that is connected directly to the processor by a memory buss.

This offset can result in an asymmetry in the switching characteristics of the bit: the amount of switching field needed to switch the bit from parallel to anti-parallel state is different from the switching field needed to switch the bit from anti-parallel state to parallel state.

Thus, at least one disadvantage of a tunnel junction memory cell having a pinned reference layer in close and fixed proximity to the data layer is a potential reduction in the magnetoresistance AR / R resulting from the angular displacement.

Such manufacturing stresses may permit the reference layer to become un-pinned and lose it's set orientation if the memory is later subjected to high temperatures.

In addition, the characteristics of the data layer may be unknowingly affected by the annealing heat during some manufacturing processes.

While utilizing multiple layers may help insure that the reference layer remains pinned, it also raises the complexity of manufacturing each and every memory cell present in the magnetic memory.

However generally speaking mass storage devices employ a system of physical movement to read and write data over high cost electronic access methods utilized in traditional main memory.

The physical movement component of a mass storage device directly affects the latency in accessing data.

This issue of providing buffering space between magnetic data bits is common in many forms of magnetic storage as used in both main and mass storage devices.

A large coercivity is generally undesirable as it requires a greater electrical field to be switched, which in turn requires a greater power source and potentially larger conductor.

Moreover, as the size of the magnetic memory decreases, the unused space between individual memory cells tends to increase.

In addition, the large currents and potentially large conductors impose physical stresses upon the design and implementation of nanotip probes.

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