Flash EEPROM with function bit by bit erasing

Abstract

A multi-bit split-gate (MSG) flash cell with multi-shared source / drain, a method of making and a method of programming the same are disclosed. Furthermore, a method of bit-by-bit erasing, in addition to page erasing, of a plurality of cells of two or more is disclosed through the application of a positive voltage forced onto the control gate of the unselected cell. Thus, by providing the bit-by-bit erasing flexibility, the bit alterability is enhanced. The MSG is formed with N+1 stacked gates comprising floating gates and control gates, separated by N select gates, all sharing the same source / drain between a pair of bit lines. The programming, that is, writing of the plurality of N+1 bits is accomplished also bit by bit where the programmed bits are selected by word line, bit line and control gate. The read operation is similar to the write operation. Thus, it is disclosed here that a plurality of N+1 bits or cells, where N is any integer, can be formed between two bit lines and along the same word line and also be programmed with enhanced bit alterability.

Description

[0001] This is a division of patent application Ser. No. 10 / 050,401, filing date Jan. 16 2002, A Flash Eeprom With Function Bit By Bit Erasing, assigned to the same assignee as the present invention.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to spilt-gate flash memory cells, and in particular, to a high density multi-bit split gate (MSG) flash EEPROM where bit by bit erasing is performed in order to enhance the bit alterability. [0004] 2. Description of the Related Art [0005] Flash EEPROM products combine the fast programming capability and high density of erasable programmable read only memories (EPROMs) with the electrical erasability of EEPROMs. As is well known, all flash EEPROM products are based on the floating gate concept. The memory can be erased electrically but not selectively. The content of the whole memory chip is always cleared in one step. The advantages over the EPROM are the faster (electrical) erasure and the ...

AI Technical Summary

Benefits of technology

The present invention provides a multi-bit split-gate (MSG) flash cell with multi-shared source / drain. The cell has a semiconductor substrate with a surface region, a first drain region, a second drain region, and a plurality of stacked gates separated by select gates. The cell also has a first bit line, a second bit line, a word line, and a plurality of control gates. The invention also provides a method of programming the cell and a method of erasing the cell. The technical effects of the invention include improved programming speed, reduced programming errors, and improved data reliability.

Problems solved by technology

Some of the disadvantages of the DSG cell are high program voltages of about 12V and also high voltages during read.

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