Pipelined clock stretching circuitry and method for I2C logic system

Abstract

A system for increasing the data throughput of an I2C bus including a serial clock conductor (3) for conducting a serial clock signal (SCK) and a serial data conductor (2) for conducting a serial data signal (SDA) includes clock-stretching control circuitry (15) coupled to the serial clock conductor (3) for stretching the serial clock signal (SCK) by holding the serial clock conductor (3) at a predetermined level to cause a master device (10) to stop sending the serial clock signal, and circuitry (FIG. 3) in the slave device (5) for releasing stretching of the serial clock signal (SCK) in response to a determination by the slave device (5) that stretching of the serial clock signal (SCK) is unnecessary.

Description

CROSS REFERENCE TO RELATED APPLICATION [0001] This application claims the benefit of prior filed co-pending U.S. provisional application Ser. No. 60 / 561,461 filed Apr. 12, 2004 entitled “PIPELINED CLOCK STRETCHING CIRCUITRY AND METHOD FOR I2C LOGIC SYSTEM” by Saripalli et al.BACKGROUND OF THE INVENTION [0002] The present invention relates generally to pipeline circuitry for clock stretching in I2C logic systems. [0003] A bus specification for I2C systems is described in detail in “THE I2C-BUS SPECIFICATION, VERSION 2.1, JANUARY 2000”, which is incorporated herein by reference. [0004] In the “slave mode” of a device of an I2C device, the serial clock signal SCK usually is automatically “stretched” after reception or transmission of a data byte by the I2C slave device. The automatic stretching of the clock signal SCK is required so that the slave device can read data that is received by it or prepare a new byte for transmission by the slave device. However, a problem of conventional I...

AI Technical Summary

Benefits of technology

[0010] It is an object of the invention to provide an I2C system which can increase the data throughput rate on the I2C bus by avoiding unnecessary stretching of the serial clock signal SCK.

[0011] It is another object of the invention to provide an I2C system which avoids the need for a slave device to stretch the clock SCK if the function of the slave device can be completed within the present byte time interval.

[0012] It is another object of the invention to provide an I2C system which allows a system developer to have the flexibility of making a decision either to suppress a future stretch of the clock SCK before it happens or to allow the stretch of the clock SCK to begin and then release it.

Problems solved by technology

However, a problem of conventional I2C systems is that if a CPU (central processing unit) device of an I2C device in its slave mode is fast enough to process the data to be received or transmitted within the present byte transaction, the automatic stretching actually can be considered to be unnecessary and therefore to unnecessarily slow down the I2C bus speed.

(However, some“stand-alone” I2C devices, such as an ADC, do not include a CPU).

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