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Method of manufacturing flash memory device

a manufacturing method and flash memory technology, applied in the direction of semiconductor devices, basic electric elements, electrical apparatus, etc., can solve the problems of device failure, abnormal oxidization of metal layers, lifting phenomena of metal layers, etc., to prevent abnormal oxidization and improve the reliability of manufacturing processes.

Inactive Publication Date: 2006-06-29
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0009] Accordingly, in view of the above problems, a method of manufacturing a flash memory device is disclosed, wherein the film quality of the buffer oxide film formed between the gate line and the insulating film spacer is made more dense by means of an annealing process before the insulating film spacer of the contact region is removed and after the gate line and source / drain are formed. As a result, abnormal oxidization is prevented from occurring due to an exposed metal layer on the gate when the insulating film spacer is removed, thereby improving the reliability of the manufacturing process.

Problems solved by technology

As a result, in a subsequent SAC process, while a buffer oxide film is formed, abnormal oxidization can be generated in the metal layer, and a lifting phenomenon can occur in the metal layer.
This may result in a failure of the device.
This makes the pattern collapse, and neighboring gate lines came into electrical contact with each other, thus causing a short or failure to occur.

Method used

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  • Method of manufacturing flash memory device
  • Method of manufacturing flash memory device
  • Method of manufacturing flash memory device

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Embodiment Construction

[0016] The scope of this disclosure is not limited by the preferred embodiments described herein.

[0017] Meanwhile, in case where it is described that one film is “on” the other film or a semiconductor substrate, the one film may directly contact the other film or the semiconductor substrate. Or, a third film may be disposed between the one film and the other film or the semiconductor substrate. Furthermore, in the drawing, the thickness and size of each layer are exaggerated for convenience of explanation and clarity. Like reference numerals are used to identify the same or similar parts.

[0018]FIGS. 2a to 2f are cross-sectional views for explaining one disclosed method of manufacturing a flash memory device. Referring first to FIG. 2a, a gate line 208 is formed on a semiconductor substrate 201. The gate line 208 can become a gate line of a memory cell or a gate line of a select transistor. In FIG. 2a, the gate line of the select transistor is shown. In this case, the gate line 208...

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Abstract

A method of manufacturing a flash memory device wherein before an insulating film spacer of a contact region is removed after a gate line and source / drain are formed, a high quality buffer oxide film formed between the gate line and the insulating film spacer is made dense by means of an annealing process. Abnormal oxidization is thus prevented from occurring due to an exposed metal layer in a gate when the insulating film spacer is removed as at least part of the buffer oxide remains after the spacer is removed.

Description

BACKGROUND [0001] 1. Technical Field [0002] A method of manufacturing a flash memory device is disclosed which prevents abnormal oxidation of a metal layer in a gate line. [0003] 2. Disclosure of the Related Art [0004] A memory cell array of a NAND flash memory device has a string-like structure. The string-like structure includes a drain select transistor connected to a bit line, a source select transistor connected to a common source, and a plurality of memory cells connected between the drain select transistor and the source select transistor in a serial manner. An insulating film spacer is formed on the sidewalls of a gate line of the select transistor and the memory cells. [0005] After source / drain are formed through impurity ion implant, a contact plug has to be formed on a common source and a drain. In order to secure the contact margin, the insulating film spacer adjacent to the contact region is removed. After a buffer oxide film and a buffer nitride film are sequentially f...

Claims

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Application Information

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IPC IPC(8): H01L21/336
CPCH01L29/42324H01L29/66825H01L29/7881H01L21/28185
Inventor LEE, SEUNG CHEOLPARK, SANG WOOK
Owner SK HYNIX INC