Mechanism for storing and extracting trace information using internal memory in microcontrollers
a microcontroller and internal memory technology, applied in the field of on-chip debug functionality in microcontrollers and microprocessors, can solve the problems of reducing the cost of implementation of trace features, reducing the cost of supporting, and reducing the availability of bus events for direct captur
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Benefits of technology
Problems solved by technology
Method used
Image
Examples
example
[0050] Assuming an implementation using 8-bit Nexus-compatible frames (2-bit MSEO control and 6-bit MDO data), and a big-endian 32-bit system bus, the RWD register 202 will be organized as shown in FIG. 4. Accordingly this register collects frames into bus-sized units.
[0051]FIG. 5 shows reconstructing a message from the trace buffer 206 (FIG. 3). In this example a message from the trace buffer 206 is shown after the CPU 32′ has been halted, with the RWA register 208 starting at 0x1000 and the CNT register=10 (i.e. the buffer size is 1024 words, or 4096 frames). When the trace was stopped, the WRAPPED status bit is set and the RWA register 208=0x 1234, so the last word of frame data written to the memory is located at 0x1230. The last two frames of the message still reside in the RWD register 202, which has been only partially filled.
[0052] If the RWD register 202 was not full by the time the breakpoint occurred, these frames are not written to the trace buffer 206. If the debug to...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


