Nonvolatile memory device including nano dot and method of fabricating the same

Abstract

A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current.

Description

PRIORITY STATEMENT [0001] This application claims the benefit of Korean Patent Application No. 10-2005-0099737, filed on Oct. 21, 2005, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. BACKGROUND [0002] 1. Field [0003] Example embodiments relate to a nonvolatile memory device and a method of fabricating the same. Other example embodiments relate to a nonvolatile memory device including an oxide layer having a resistance gradient, which unifies current paths in the oxide layer by forming a nano dot in the oxide layer, and a method of fabricating the same. [0004] 2. Description of the Related Art [0005] Research has been conducted to enhance the integration density of semiconductor devices, for example, semiconductor memory devices. As the integration density is enhanced, the memory capacity per unit area of the memory devices may be improved. Research has also been conducted on driving the device at relatively lo...

AI Technical Summary

Benefits of technology

[0016] Example embodiments provide a nonvolatile memory device having a decreased and stabilized reset current value and a stabilized set voltage, thereby improving the reliability of the memory device, the memory device including an oxide layer formed of a resistance-changing material.

Problems solved by technology

Because DRAM is a volatile memory device, stored data may be lost when the power is turned off.

Unlike DRAMs, flash memory may be nonvolatile, but it may have relatively low integration density and relatively slow operating speed, compared to DRAMs.

When PRAM is fabricated by using a conventional semiconductor device fabrication process, etching may be difficult and a relatively long fabrication time may be required.

The unit cost of a product may increase due to relatively low productivity, thereby decreasing price competitiveness.

Such unstable results may be the result of the irregular current path distribution in the oxide layer 12.

When the RC value is unstable and relatively high, the reliability of the semiconductor memory device may be relatively low and power consumption may increase.

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