Nonvolatile memory device, system comprising nonvolatile memory device, and read operation of nonvolatile memory device

Abstract

A nonvolatile memory device comprises a memory cell array, a page buffer, and a control circuit. The memory cell array comprises multi-level cells configured to store hard decision data bits. The page buffer is configured to sense whether each of the multi-level cells assumes an on-cell state or an off-cell state in response to a first read voltage applied to a selected wordline during a first read operation, to set first soft decision data bits according to the first read operation, and to sense one or more hard decision data bits from each of the multi-level cells in response to a second read voltage applied to the selected wordline in a second read operation. The control circuit is configured to control the first read operation and the second read operation to be performed in succession.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2010-0044124 filed on May 11, 2010, the disclosure of which is hereby incorporated by reference in its entirety.BACKGROUND OF THE INVENTION[0002]Embodiments of the inventive concept relate generally to nonvolatile memory devices. More particularly, embodiments of the inventive concept relate to nonvolatile memory devices designed to reduce common source line (CSL) noise and improve read performance.[0003]Nonvolatile memory devices retain stored data even when disconnected from power. Examples of nonvolatile memory devices include flash memory, read only memory, and various forms of resistive memory.[0004]In an effort to improve the storage capacity of flash memory devices, researchers have designed some flash memory devices to store multiple bits of data per memory cell. These devices are referred to as multi-level cell flash memory devices.[0005]To ...

AI Technical Summary

Benefits of technology

[0006]Embodiments of the inventive concept provide nonvolatile memory devices that perform read operations by successively sensing a soft decision data bit and a hard decision data bit. Embodiments of the inventive concept also provide methods of performing the read operations. Some embodiments are capable of reducing CSL noise and improving read performance.

Problems solved by technology

One challenge in doing so is eliminating noise that can cause different states to be confused with each other.

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