Methods for fabricating finfet integrated circuits on bulk semiconductor substrates

Abstract

Methods are provided for fabricating FinFET integrated circuits on bulk semiconductor substrates. In accordance with one embodiment a patterned hard mask that defines locations of a regular array of a plurality of fins is formed overlying a semiconductor substrate. Portions of the patterned hard mask are removed using a cut mask to form a modified hard mask. The substrate is etched using the modified hard mask as an etch mask to form a plurality of fins extending upwardly from the substrate and separated by trenches. Selected ones of the plurality of fins are at least partially removed to form isolation regions and an insulating material is deposited to fill the trenches and to cover the at least partially removed selected ones of the plurality of fins.

Description

TECHNICAL FIELD[0001]The present invention generally relates to methods for fabricating FinFET integrated circuits, and more particularly relates to methods for fabricating and isolating FinFET integrated circuits on bulk semiconductor substrates.BACKGROUND[0002]As integrated circuits (ICs) become larger and larger it becomes necessary to consider structures other than planar transistors to accommodate the ever increasing number of transistors that the circuits require. One such structure is the FinFET, a field effect transistor (FET), in which the channel of the transistor is formed along the vertical sidewalls of a thin semiconductor fin that extends upwardly from a semiconductor substrate. Because the channel is formed along a vertical fin sidewall rather than along the horizontal surface of the wafer, a wide channel (and hence high performance) can be achieved without increasing the horizontal surface area of the semiconductor substrate.[0003]The fabrication of FinFET ICs, howev...

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Benefits of technology

[0007]In accordance with yet another embodiment, a semiconductor substrate is provided and a first mask is formed overlying the semiconductor substrate and defining a plurality of parallel fin locations extending in a first direction and selectively cut in a second direction. The semiconductor substrate is etched using the first mask as an etch mask to form a plurality of parallel fins extending in a first direction and

Problems solved by technology

The fabrication of FinFET ICs, however, encounters some processing problems.

Among the problems encountered are the loading effects that arise when etching a plurality of fins.

Such variance in fin width and tren

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