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Power on reset (POR) circuit

a power on reset and circuit technology, applied in electronic switching, pulse automatic control, pulse technique, etc., can solve the problems of large power consumption, difficult to use por in circuits requiring sleep mode or circuits, and consuming significant power, and achieve the effect of small power consumption

Inactive Publication Date: 2014-06-19
SAMSUNG ELECTRO MECHANICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a power on reset (POR) circuit that can be used in circuits or chips that require low power consumption. This is achieved by adding a circuit that can detect when the system is in a brown out state, resulting in a POR circuit with small power consumption.

Problems solved by technology

However, the POR always needs to consume current.
Therefore, it is difficult to use the POR in a circuit requiring a sleep mode or a circuit needed to have small power consumption.
However, in the case of the POR circuit according to related art as described above, since the current mirror circuit 110 always operates, it consumes significantly large power.
In addition, since the current mirror circuit 110 always operates as described above, it is difficult to use in the case requiring the sleep mode or in the case of the IC requiring low power.

Method used

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Embodiment Construction

[0029]The terms and words used in the present specification and claims should not be interpreted as being limited to typical meanings or dictionary definitions, but should be interpreted as having meanings and concepts relevant to the technical scope of the present invention based on the rule according to which an inventor can appropriately define the concept of the term to describe most appropriately the best method he or she knows for carrying out the invention.

[0030]Through the present specification, unless explicitly described otherwise, “comprising” any components will be understood to imply the inclusion of other components but not the exclusion of any other components. The terms “unit”, “module”, “device” or the like means a unit processing at least one function or operation, which may be implemented by hardware, software, or combinations of the hardware and the software.

[0031]Hereinafter, embodiments of the present invention will be described in detail with reference to the ...

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Abstract

Disclosed herein is a power on reset (POR) circuit, including: a current mirror circuit adjusting ratio of current flowing in a circuit according to voltage supplied from power; an inverter driven according to output of the current mirror circuit to output a POR signal; a brown out detection (BOD) comparator electrically connected to the current mirror circuit and comparing the voltage supplied from the power with reference voltage to output a corresponding voltage signal according to the comparison result; a BOD controlling switch driven when the output of the BOD comparator is zero voltage (0V) to again operate a POR; and a current controlling switch installed in the current mirror circuit and driven when the output of the BOD comparator is zero voltage (0V) to control and supply current of the POR.

Description

CROSS REFERENCE(S) TO RELATED APPLICATIONS[0001]This application claims the benefit under 35 U.S.C. Section 119 of Korean Patent Application Serial No. 10-2012-0148432, entitled “Power On Reset (POR) Circuit” filed on Dec. 18, 2012, which is hereby incorporated by reference in its entirety into this application.BACKGROUND OF THE INVENTION[0002]1. Technical Field[0003]The present invention relates to a power on reset circuit employed in an integrated chip (IC) and the like, and particularly, to a power on reset circuit capable of even being in a circuit requiring a sleep mode or the IC requiring low power consumption.[0004]2. Description of the Related Art[0005]A power on reset (hereinafter, abbreviated as ‘POR’) circuit is a circuit necessary for an integrated chip (IC) including a digital circuit. A digital block needs a structure in which the digital block is not automatically turned on while power VDD is applied thereto but data stored in the digital block is reset by input of a ...

Claims

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Application Information

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IPC IPC(8): H03L5/00
CPCH03L5/00H03K17/223G05F3/02G05F3/26
Inventor PAEK, HYUNKO, JOO YUL
Owner SAMSUNG ELECTRO MECHANICS CO LTD