Systems and methods for secured data transfer via inter-chip hopping buses

a technology of secured data and inter-chip hopping, which is applied in the direction of transmission, digital data protection, computer security arrangements, etc., can solve the problems of damaged data security of the circuit, decrypted data may be intercepted, etc., and achieve the effect of preventing unwanted changes

Inactive Publication Date: 2016-11-03
MARVELL ASIA PTE LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a system and method for secure data transfer between electronic components using inter-chip hopping buses. The system includes a non-volatile storage element with a unique identifier and a scramble pattern generator that generates a scramble pattern based on a counter value at runtime. The system also includes an XOR gate to receive the scramble pattern and data from a transceiver buffer to generate output data for transmission. The method also includes configuring a receiver component to receive the output data and control packets to enforce security checks. The system and method provide a way to securely transfer data between electronic components and prevent unauthorized access.

Problems solved by technology

If probing circuitry is added to the communication chip, the decrypted data may be intercepted by the probing circuitry.
Thus, the originally encrypted multimedia data may be exposed to a third party by the probing circuitry and the data security of the circuit is damaged.

Method used

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  • Systems and methods for secured data transfer via inter-chip hopping buses
  • Systems and methods for secured data transfer via inter-chip hopping buses
  • Systems and methods for secured data transfer via inter-chip hopping buses

Examples

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Embodiment Construction

[0025]This disclosure describes methods and systems for a mechanism to securely transfer data between electronic components via inter-chip hopping buses (IHBs) on a motherboard. Specifically, an IHB security module within an electronic component can generate a scramble pattern to scramble data to be sent or de-scramble received data. The transceiver component and the receiver component synchronously generate and use a scramble pattern for encryption or decryption, respectively, such that the receiver component can de-scramble the secured data packets received from the transceiver.

[0026]FIG. 1A provides an exemplary block diagram illustrating IHB security components within a multi-device-based architecture (MDBA) platform. As shown in FIG. 1A, multiple electronic components, such as chip #0100 and chip #1101, may be connected via IHB on a motherboard. For example, chip #0100 can be a master chip such as a multimedia processor and / or the like, and chip #1101 can be a communication chi...

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PUM

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Abstract

Systems and methods described herein provide a method for secured data transfer via inter-chip hopping buses. The method includes configuring a non-volatile storage element located within a first electronic component to be pre-programmed with a first unique identifier associated with a first electronic component. The method further includes configuring a first scramble pattern generator located within the first electronic component for generating a first scramble pattern based on a first counter value at runtime of the first electronic component. The method further includes configuring a first XOR gate located within the first electronic component to receive the first scramble pattern from the first scramble pattern generator and data from a transceiver buffer for generating output data to be transmitted out of the first electronic component.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This disclosure claims the benefit of copending, commonly-assigned U.S. Provisional Patent Application No. 62 / 156,094, filed May 1, 2015, which is hereby incorporated by reference herein in its entirety.FIELD OF USE[0002]This disclosure relates to secured data transfer via inter-chip hopping buses, for example, on an integrated circuit board.BACKGROUND OF THE DISCLOSURE[0003]The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.[0004]On a printed circuit board, multiple electronic components can often be mechanically supported and electrically connected to perform data processing tasks. For e...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F21/60H04L9/06H04L9/32
CPCG06F21/606H04L9/0643H04L9/3236H04L9/0631H04L9/12H04L2209/20H04L2209/12
Inventor ZHANG, MINDA
Owner MARVELL ASIA PTE LTD
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