Latch circuit, double data rate ring counter based on the latch circuit, hybrid counting device, analog-digital converting device, and CMOS image sensor

Abstract

Disclosed are a latch circuit receiving a negative output of a next stage latch circuit as a feedback input, a double data rate (DDR) ring counter based on the latch circuit to perform DDR counting of pulse periods and reduce the number of toggles, a hybrid counting device counting lower-bit portion by using the latch-based DDR ring counter and upper-bit portion by using a binary counter, and an analog-to-digital converting device and a CMOS image sensor employing the hybrid counting device. A double data rate ring counter may include a plurality of latches coupled in a ring type. The plurality of latches may include positive-edge-triggered latches and negative-edge-triggered latches arranged alternately. A current stage latch receives an output of a previous latch stage to shift to a next latch stage according to a counter clock, receives an output of the next latch stage to check a data shift to the next latch stage, and falls to a low level if the data shift is checked.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]The present application claims priority of Korean Patent Application No. 10-2015-0156616, filed on Nov. 9, 2015, which is incorporated herein by reference in its entirety.BACKGROUND[0002]1. Field[0003]Various embodiments of the present invention relate generally to a complementary metal oxide semiconductor (CMOS) image sensor and, more particularly, a latch circuit, a double data rate ring counter based on the latch circuit, a hybrid counting device employing the double data rate ring counter, an analog-to-digital converting device employing the hybrid counting device, and a CMOS image sensor employing the analog-to-digital converting device.[0004]2. Description of the Related Art[0005]In a counter structure where a certain period of a pulse signal, e.g., a comparator output signal, is counted by using a reference clock or a counter clock in a CMOS image sensor, for example, power consumption may increase generally in proportion to the nu...

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Benefits of technology

[0036]According to embodiments of the present invention, data rate of the counter may be enhanced since the ring type counter is implemented to operate in the double data rate.

[0037]Also, according to embodiments of the present invention, the ring type counter is implemented on a basis of latches rather than flip-flops,

Problems solved by technology

In a counter structure where a certain period of a pulse signal, e.g., a comparator output signal, is counted by using a reference clock or a co

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