A chip testing method and an apparatus for testing of a plurality of field emission light sources
a field emission light source and testing method technology, applied in the direction of lamps testing, electric lighting sources, instruments, etc., can solve the problems of occupying further space, occupying a significant part of the cost of manufacturing, and occupying a significant amount of the cost of both purchase and maintenance, so as to save cost and space in the end user application, reduce mechanical stress, and ensure the effect of quality
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[0029]The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which currently preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided for thoroughness and completeness, and fully convey the scope of the invention to the skilled addressee. Like reference characters refer to like elements throughout.
[0030]Referring now to the drawings and to FIG. 1 in particular, there is illustrated a typical process flow 100 for wafer test, sawing / dicing, encapsulation and final test in order to put the invention into context. Once the manufacturing of a wafer containing multiple field emission light sources (FELs) has been completed, the wafer is to be tested, for example by a test system 102, and the parametric data such as for example operating voltage, current, power...
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