Method for controlling a non-volatile semiconductor memory device

Abstract

A non-volatile semiconductor memory device has a NAND string, in which multiple memory cells are connected in series. A read procedure is performed for a selected memory cell in the NAND string on the condition that the selected memory cell is applied with a selected voltage while unselected memory cells are driven to be turned on without regard to cell data thereof. In the read procedure, a first read pass voltage is applied to unselected memory cells except an adjacent and unselected memory cell disposed adjacent to the selected memory cell, the adjacent and unselected memory cell being completed in data write later than the selected memory cell, and a second read pass voltage higher than the first read pass voltage is applied to the adjacent and unselected memory cell.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application is based on and claims the benefit of priority from the prior Japanese Patent Application No. 2007-239089, filed on Sep. 14, 2007, the entire contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]This invention relates to a non-volatile semiconductor memory device with a floating gate type memory cell of a floating gate type, and specifically relates to a method of controlling read / write of a NAND-type flash memory.[0004]2. Description of the Related Art[0005]A currently manufactured NAND-type flash memory has floating gate type of memory cells, wherein write and erase of whichoperations are performed with electron-injection and electron-releasing ofat the respective floating gates (FGs). ControllingBy controlling the electron injection quantity in a floating gate, it is ablepossible to set multiple threshold voltage states (i.e., data states). In practice, i...

AI Technical Summary

Benefits of technology

The proposed method effectively reduces back pattern noise and threshold voltage shifts, improving data integrity and storage accuracy in highly integrated NAND-type flash memories by carefully managing the read pass voltages applied to unselected memory cells, particularly in designs with smaller feature sizes.

Problems solved by technology

What becomes problematic whenProblems occur as the NAND-type flash memory is more highly integrated and stores more data bits per cell is; creating an interference noise between floating gates.

However, as the highlyhigher integration of the NAND-type flash memories progresses, there is possibility that it becomes more difficult to avoid the interference noise between adjacent cells.

Images