4 results about "Reference architecture" patented technology

The invention discloses a digital-real fusion test evaluation method and device based on a digital test verification reference architecture, and the method comprises the steps: carrying out the preliminary digital deduction in a digital domain based on physical domain data; a digital domain evaluation method is constructed, and iterative optimization of the digital model is completed; physical domain verification is carried out, and a comparison evaluation method of digital domain and physical domain results is established; and combining physical domain data and digital domain evaluation indexes, continuously iteratively optimizing until actual requirements are met, and then applying to real installation. According to the method, dynamic calibration and fusion verification between a physical domain and a digital domain are realized by constructing a digital-real fusion iterative closed-loop evaluation process, and the adaptability and credibility of a digital test system under complex working conditions are remarkably improved. The method has the advantages of high efficiency, low cost and good expansibility, provides a feasible number-real fusion test evaluation means for performance evaluation and optimization design of a complex system, and has a wide engineering application prospect.

A method for constructing a topology reference structure for a production line is provided. The present disclosure is based on historical production line topology data of an enterprise to extract a commonly used topology reference structure for a production line of the enterprise by a computer through a machine learning (ML) algorithm, so as to form a typical production line topology group of the enterprise. The present disclosure can record typical production line characteristics and production habits of the enterprise, realize reuse of a production line structure and production line construction knowledge, reduce the workload of production line designers, and improve the production line construction efficiency of the enterprise. In addition, the present disclosure avoids the interference of designers' subjective decisions to a certain extent, and the reference structure extracted by the computer has high reference value, and is objective, mature, and stable.

Embodiments of a software defined automation system that provides a reference architecture for designing, managing and maintaining a highly available, scalable and flexible automation system. In some embodiments, an SDA system can include a localized subsystem including a system controller node and multiple compute nodes. The multiple compute nodes can be communicatively coupled to the system controller node via a first communication network. The system controller node can manage the multiple compute nodes and virtualization of a control system on a compute node via the first communication network. The virtualized control system includes virtualized control system elements connected to a virtual network that is connected to a second communication network to enable the virtualized control system elements to control a physical control system element via the second communication network connected to the virtual network.

An automatic compilation method and framework for generating a layout for an integrated memory-compute circuit design is provided. The automatic compilation method comprises: constructing a design database with at least one basic design library and a collection of referencing architecture templates; receiving a user specification associated with the integrated memory-compute circuit design; selecting a referencing architecture template from the design database and parameterizing the selected architecture template according to the received user specification to generate an architecture for the integrated memory-compute circuit design; generating a physical layout based on the generated architecture according to one or more placement-and-routing algorithms; iterating a design exploration loop on the generated layout with one or more expertise experience-based optimization schemes to obtain one or more explored physical layouts; and evaluating hardware metrics of the one or more explored physical layouts to determine an optimal physical layout.