High-speed serial data communication self-adaptive clock configuration method

Abstract

The invention discloses the method for allocating the adaptive clock in high-speed serial data communication. The invented method is utilized in packet switching network of the data communication area, aiming at high-speed serial data communication. With the value being preset and the delimited mark being searched, based on the pre-synchronization state, the adaptive serial sampling clock is allocated in the invention. It is possible for the serial clock to produce phase shift with 180 degrees, to increase the sampling setup time and maintain time of the serial clock. When both phases of the said times can not be pre-synchronized successfully, the method reports the state information. Unstable issue of sampling serial data caused by the discreteness of the time delay of each circuit in the high-speed serial communication can be effectively solved by use of the invented method.

Description

technical field [0001] The invention relates to a data communication system, in particular to an adaptive clock configuration method for high-speed serial data communication of a packet data switching network in a mobile communication system. Background technique [0002] In the station control system in the current mobile communication system or in other packet switching networks, a multi-channel high-speed serial communication controller is often required to realize the aggregation node of sub-network data in the packet switching network. As far as the current products are concerned, they can be roughly divided into two categories: one is implemented by special IC devices, and these products have the disadvantages of complex configuration and high cost. The other type can be self-developed and designed through FPGA, which has the advantages of flexible configuration and low cost. In the development process of BSC (base station controller) for CDMA system, high-speed serial...

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Problems solved by technology

[0003] As far as the current application is concerned, no matter what kind of product it is, there are the following problems: due to the time delay of the driving device and the cable line, and because of the different types of driving devices and the different lengths of the lines, the discreteness of this time delay is very large. Large, resulting in the uncertainty of the phase of the clock and data bits in the serial communication process, the establishment and maintenance of serial communication often occur insufficient time, making the system unstable

At present, no domestic and foreign literature related to solving the above problems has been retrieved.

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