Method for reducing energy consumption of plasma display

Abstract

The invention relates to a method for controlling two return units at two sides of panel of plasma display to reduce the energy consumption of display, wherein it forms serial resonance circuit in the opposite period of one working period, to charge one capacitor of each return units at two times, while one charge process charges the capacitor by panel, and another charge process charges the capacitor via another capacitor in another return unit; and it can control said two capacitors to charge the panel.

Description

technical field [0001] The invention relates to a method for reducing energy consumption of a plasma display, in particular to a method for improving the power saving efficiency of a plasma display. Background technique [0002] A plasma display (Plasma Display Panel, PDP) is large and thin, and will be the mainstream of large-size displays in the future. The principle of the plasma display is to drive the charge in the plasma back and forth by high-voltage and high-frequency alternating current, and emit ultraviolet rays during the driving process to excite the phosphor on the tube wall to emit light. The circuit characteristics of a plasma display can be roughly represented by a panel capacitance. When driving a plasma display, a sudden short circuit or high voltage is applied to the two poles of the capacitive load, which will cause a large current in an instant and cause a lot of energy loss. This is an urgent problem to be solved for the driving circuit of the plasma d...

AI Technical Summary

Problems solved by technology

Ideally, the voltage Vx should be raised to Vs at this time, but also due to the influence of high-frequency capacitive effects, inductive effects, and resistive effects, the voltage Vx can only be raised to about (Vs-2ΔV1)

so that time point t 3 Afterwards, when the switch SW1 is turned on, the voltage Vx will increase from (Vs-2ΔV1) to Vs, so that electric energy is wasted when the left electrode of the panel 10 is connected to the upper bias terminal Vs.

[0008] To sum up, the known method for driving the sustain electrode driving circuit of the plasma display will cause the first driving circuit 20 and the second driving circuit 30 to fail due to the influence of the high-frequency capacitance effect, inductance effect and resistance effect As expected, the potentials Vx and Vy on the left and right sides of the panel are pre-adjusted to Vs or zero potential, so the function of Zero-Voltage Switching (ZVS) cannot be achieved

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