Non-volatile memory and making method

Abstract

The invention discloses a manufacturing method of a non-volatile memory. First, a substrate is provided with a plurality of isolation structures protruding from the surface of the substrate, and a first mask layer has been formed on the substrate between the isolation structures. Then a second mask layer is formed on the substrate. After that, the second mask layer and the first mask layer are patterned to form a plurality of openings, and the openings expose part of the surface of the substrate and the surface of the isolation structure. Then a tunneling dielectric layer and a first conductor layer are formed on the substrate. The first conductive layer fills the opening. And the isolation structure, the second mask layer and the first mask layer separate the first conductor layer into blocks. Then an inter-gate dielectric layer is formed on the substrate. A second conductor layer is then formed on the base to fill up the opening. Afterwards, a plurality of doped regions are formed in the substrate on both sides of the second conductor layer.

Description

technical field [0001] The invention relates to a semiconductor element, in particular to a non-volatile memory and a manufacturing method thereof. Background technique [0002] The flash memory (Flash) in the non-volatile memory has become one of the mainstream researches in the industry due to its fast and time-saving operation mode and cost advantages. Among them, the commonly used flash memory arrays include a NOR gate (NOR) array structure and a NAND gate (NAND) array structure. The flash memory structure of the NAND gate (NAND) array is to connect each storage unit in series, and its integration and area utilization are better than the flash memory of the NOR gate (NOR) array, and it has been widely used in various electronic products middle. [0003] At present, most NAND-type flash memories have two parts: a floating gate and a control gate, and the manufacturing process often requires more than two photomasks to define the two gates. That is to say, more than two...

AI Technical Summary

Problems solved by technology

However, the photolithography and etching process is the most complicated and expensive part in the manufacturing process of semiconductor elements. Therefore, the more times of photolithography and etching (the number of photomasks), the more often the required process will be greatly increased. cost and time spent

[0004] In addition, since the floating gate and the control gate are formed by etching the conductor layer directly, it is easy to form a microbridge between adjacent conductor layers, making the adjacent conductor layer contact between the resulting short circuit

This situation will become more serious as the line width shrinks

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