Array substrate for liquid crystal display device and method of fabricating the same

Abstract

An array substrate for liquid crystal display devices includes first and second gate lines spaced apart from each other, a common line between the first and second gate lines parallel to the first and second gate lines, a data line crossing the first and second gate lines to define first and second pixel regions with respect to the common line, a first thin film transistor at a crossing portion of the first gate line and the data line, a second thin film transistor at a crossing portion of the second gate line and the data line, a first pixel electrode connected to the first thin film transistor in the first pixel region, and a second pixel electrode connected to the second thin film transistor in the second pixel region, wherein the first and second pixel electrodes have a symmetric shape with respect to the common line.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2006-058231 filed in Korea on June 27, 2006, which is incorporated herein by reference in its entirety. technical field [0002] The invention relates to a liquid crystal display (LCD) device, in particular to an array substrate for an LCD device with a high aperture ratio and a manufacturing method thereof. Background technique [0003] In general, LCD devices display images using optical anisotropy and polarity characteristics of liquid crystal molecules. The elongated liquid crystal molecules have directionality. The alignment direction of the liquid crystal molecules can be controlled by applying an electric field to the liquid crystal molecules. As the intensity of the electric field changes, the alignment of the liquid crystal molecules changes accordingly. Since the refraction of incident light passing through the liquid crystal depends on the orientation of liquid crystal molecules, imag...

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Problems solved by technology

As a result, the brightness of dark images increases, resulting in a decrease in the aperture ratio

[0017] In addition, if the aperture ratio is increased by reducing the width of the common line 40 in the pixel region "P", the resistance of the common line 40 increases, which will cause a voltage drop

On the other hand, when the width of the common line increases, the supplied storage voltage becomes unstable and the aperture ratio decreases

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