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Filling method for metal front insulation layer

A filling method and technology of insulating layers, which are applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as reduced production efficiency, limitation of filling materials, and impact on device performance, so as to increase gap openings and enhance reliability. , the effect of reducing the aspect ratio

Active Publication Date: 2008-02-13
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology

However, when applying this method, in order to prevent the precursor from being melted, it is required that the melting point of the seed crystal material must be lower than the melting point of the precursor, resulting in the application of this method will be severely limited in the selection of filling materials; The heat treatment process is applied after the device is formed, which is easy to affect the performance of the device; in addition, the growth cycle of the single crystal is long, and the formation of seamless filling by this method will also cause a decrease in production efficiency
In summary, the existing gap filling methods cannot meet the needs of actual production

Method used

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  • Filling method for metal front insulation layer
  • Filling method for metal front insulation layer
  • Filling method for metal front insulation layer

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Embodiment Construction

[0028] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings. In order to avoid unnecessary confusion, descriptions of known process operations are omitted in the description of the embodiments herein.

[0029] The steps of applying the method of the present invention to fill gaps between gates with a high aspect ratio are as follows: firstly, obtaining a gap between gates with a high aspect ratio on the surface of the substrate; Reduce the aspect ratio of the gap; finally, apply the HDP CVD process to fill the gap between the gates.

[0030] Fig. 3 is a device cross-sectional schematic diagram illustrating each step of filling gaps in an embodiment of the method of the present invention. As shown in the figure, as an embodiment of the present invention, the specific implementation steps of filling...

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Abstract

A padding method for the front insulating layer of metal comprises: grids and a side wall surrounding the grid are formed on the surface of the underlayer; an obstructing layer, covering the surface of the grid and the side wall, is formed and between the grids of the covering and obstructing layer are gaps; part of the obstructing layer is sputtered to expand the gap openings between the grids; the front insulating layer of metal is deposited and the front insulating layer of metal materials fill the gaps between grids. Through adding a sputtering step before the deposit step, the gap openings are increased and the depth-to-width ratio is reduced and the top of the gaps does not cause the accumulation of settlings of the filling materials, thus preventing the production of empty holes when the gaps are filled and guarantying the stability of the properties of the device and strengthening the reliability of the device.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for filling an insulating layer before a metal. Background technique [0002] With the development of semiconductor feature size to 65 nanometers or even finer structures, higher requirements are put forward for the filling of seams, especially for the filling of gaps between gates with high aspect ratios. The aspect ratio of the gap reaches 6:1 or even higher, which is a huge challenge for the filling process. [0003] High-density plasma chemical vapor deposition (High Density Plasma Chemical VaporDeposition, HDPCVD) can prepare gaps that can fill high aspect ratios (defined as the ratio of the depth and width of gaps) at a relatively low deposition temperature of 300-400 °C. Membranes are widely used in current actual production. [0004] In actual production, it has been found that for devices with 65nm and finer structures, when using a single-...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/31
Inventor 张文广刘明源
Owner SEMICON MFG INT (SHANGHAI) CORP
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