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Multi-threshold mos circuits

A multi-threshold, circuit technology, applied in electrical components, generating electrical pulses, pulse generation, etc., can solve problems such as high leakage current in CMOS circuits

Inactive Publication Date: 2008-03-05
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

CMOS circuits constructed entirely using low-threshold (LVT) transistors are faster but have high leakage currents

Method used

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Examples

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Embodiment Construction

[0017] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

[0018] The circuit design techniques described here can be used for a variety of MOS circuits. For clarity, these techniques are specifically described below for a D flip-flop.

[0019] FIG. 1 shows a block diagram of a D flip-flop circuit 100 including a master latch 110 and a slave latch 120 . The master latch 110 has a data input terminal (Dm), a data output terminal (Qm), a clock input terminal and an enable input terminal. The slave latch 120 has a data input terminal (Ds), a data output terminal (Qs), a clock input terminal and an enable input terminal. The data input of the master latch 110 represents the data input (D) of the D flip-flop 100 . The data output of master latch 110 is coupled to the data input o...

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PUM

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Abstract

A multi-threshold flip-flop includes a master latch, a slave latch, and at least one control switch. The master latch is composed of an input buffer formed with low threshold (LVT) transistors and a first latch circuit formed with LVT transistors. The slave latch is composed of a second latch circuit formed with high threshold (HVT) transistors and an output driver formed with LVT transistors. The at least one control switch enables or disables the LVT transistors and is implemented with at least one HVT transistor. The LVT and HVT transistors may be N-FETs and / or P-FETs. The multi-threshold flip-flop can operate at high speed, has low leakage current, and can save the logic state when disabled.

Description

[0001] This application claims priority to US Provisional Application No. 60 / 642,934, filed January 10, 2005, entitled "A Multi-ThresholdMOS Flip-Flop Circuit." technical field [0002] The present invention relates generally to electronic circuits and, more particularly, to metal oxide semiconductor (MOS) circuits. Background technique [0003] Integrated circuit (IC) manufacturing technology continues to advance, resulting in ever-shrinking transistor sizes. This enables more transistors and more complex circuits to be fabricated on an IC chip, or alternatively, a smaller IC chip can be used for a given circuit. Smaller transistor sizes also enable faster operation and can provide other benefits. [0004] For CMOS, which is widely used in digital circuits and some analog circuits, the main problem brought about by the scaling of transistors is leakage current. Smaller transistor geometries result in higher electric fields which can stress the transistor and cause the oxi...

Claims

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Application Information

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IPC IPC(8): H03K3/00
Inventor S·兰普拉撒德
Owner QUALCOMM INC