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Medium reinforced pipelined multiplication unit design method supporting multiple mode

A technology of multiplication unit and design method, applied in program control design, calculation, instrument, etc., can solve the problems of low cost of embedded microprocessor, poor digital signal processing capability, and inadequate programming complexity, so as to improve the computing throughput. , the effect of improving the processing speed

Inactive Publication Date: 2008-04-16
ZHEJIANG UNIV +1
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  • Summary
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AI Technical Summary

Problems solved by technology

However, since DSP products are mainly used in the computing field rather than the control field, this makes them unable to cope with the current multi-tasking and increasing programming complexity.
[0005] The cost of the embedded microprocessor is relatively low, and the ability to execute complex control programs is strong, but the ability to process digital signals is relatively poor

Method used

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  • Medium reinforced pipelined multiplication unit design method supporting multiple mode
  • Medium reinforced pipelined multiplication unit design method supporting multiple mode
  • Medium reinforced pipelined multiplication unit design method supporting multiple mode

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Embodiment Construction

[0031] The multi-mode media-enhanced pipeline multiplication unit is a media algorithm-enhanced hardware execution unit designed for general-purpose embedded processors. It is merely an execution unit, a useful complement to complex embedded processors.

[0032] The characteristics of the design method of the multi-mode media enhanced pipeline multiplication unit are as follows:

[0033] 1) Dynamically select ordinary single instruction single data multiplication, single instruction multiple data multiplication, multiple instruction multiple data multiplication or high precision multiplication according to different types of assembly instructions;

[0034] 2) The above four multiplications adopt pipeline design;

[0035] 3) The above four multiplication operations are separated into two stages of operand preparation and data operation, and each stage is processed separately;

[0036] 4) Each data channel of the multi-mode media enhanced pipeline multiplication unit can perfo...

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Abstract

The invention discloses a multi-mode supported media reinforcement flowline multiplication unit design method. Besides realizing the common multiplication and the multiplication progression operations, the invention also provides the single instruction multiple data (SIMD) mode aiming at the data parallelism in the media application, the multiple-instruction multiple data (SDMD) mode aiming at the non data parallelism in the media application and the high accuracy operation mode aiming at the high accuracy data operation. The four multiplication operation modes provide the support for the complex algorithm of the digital signal processing in the media application field. The four modes can be dynamically switched by instructions, thereby effectively reducing the time of the algorithm switch. The multiplication unit applies flowline design methods respectively aiming at different multiplications, thereby improving the operation speed of all multiplications and greatly enhancing the operation efficiency. When the multiplication unit provided by the invention is applied to an embedding type processor, the digital signal processing capability of the embedding type processor is improved and the application domain is widened.

Description

technical field [0001] The invention relates to a design method of a media enhancement pipeline multiplication unit supporting multiple modes. Background technique [0002] With the continuous development of multimedia codec, communication technology and VLSI design capability, the multimedia audio and video application field based on embedded processor and DSP has been greatly developed. At present, consumer electronic products, such as mobile phones, MP3, digital TV, digital broadcasting, etc. have become common cheap consumer goods. [0003] On the other hand, with the continuous development of technology, users' requirements for real-time performance, complexity and audio and video quality of multimedia products are also increasing. This forces the further development of multimedia technology and further innovation in the realization of digital signal processing. Hardware accelerated codec processing has become an inevitable choice for digital signal processing. For di...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F9/318
Inventor 严晓浪徐鸿明龚帅帅葛海通
Owner ZHEJIANG UNIV
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