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Method, device and system for field programmable gate array test

A gate array and test circuit technology, applied in the field of integrated circuits, can solve problems such as difficulty in online testing of FPGA testing and no support for remote testing.

Inactive Publication Date: 2008-06-11
SHANGHAI HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the embodiments of the present invention is to provide a field programmable gate array test method, device and system to solve the problem of online test difficulty and non-support remote test of FPGA test in the prior art

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  • Method, device and system for field programmable gate array test

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Embodiment Construction

[0025] The embodiment of the invention discloses a field programmable gate array testing method, device and system.

[0026] The embodiment of the present invention converts the output of the JTAG interface of the test circuit into another interface format and connects with the control chip on the single board by adding an interface conversion function module inside the existing FPGA, and then the control chip on the single board passes through The external communication interface communicates with the testing computer, which can well solve the problems of online testing and remote testing.

[0027] The specific implementation manners of the embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0028] FIG. 2 is a schematic structural diagram of a system for implementing FPGA testing provided by an embodiment of the present invention.

[0029] In the following embodiments of the present invention, the CP...

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Abstract

The embodiment of the invention provides a method, a device and a system for testing the field programmable gate array, the method of which comprises that: the control chip receives the FPGA (field programmable gate array) and test the data of interface format recognized by the control chip output after the transformer of the related information; the control chip sends the data of interface format which can be recognized to the test computer; the control chip receives the control information sent by the test computer; the control chip sends the control information to FPGA. The embodiment of the invention solves the problems that the online test and remote test can not be achieved due to the limit of JTAG interface and the JTAG cable in length in prior art by the control chip on the veneer and the external communication interface.

Description

technical field [0001] The invention relates to the technology in the field of integrated circuits, in particular to a field programmable gate array testing method, device and system. Background technique [0002] With the development of electronic technology, people use electronic information equipment more and more frequently to process various information flows and data flows to meet the growing demands. FPGA (Field Programmable Gate Array, Field Programmable Gate Array) has been widely used in electronic information equipment in many fields such as communication, data processing, network, instrument, industrial control, military and aerospace. FPGA is a product further developed on the basis of programmable devices such as PAL (Programmable Array Logic, programmable array logic), GAL (Generic Array Logic, general array logic), and CPLD (Complex Programmable Logic Device, complex programmable logic device). It emerged as a semi-custom circuit in the field of dedicated AS...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/317G01R31/319
Inventor 郭晓川
Owner SHANGHAI HUAWEI TECH CO LTD
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