An active member array structure and the corresponding manufacturing method

A technology of array structure and active components, applied in the fields of semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as the inability to reduce process costs, improve display aperture ratio, reduce stray capacitance, and reduce process costs Effect

Active Publication Date: 2008-07-09
AU OPTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the use of five masks makes the process cost can not be reduced

Method used

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  • An active member array structure and the corresponding manufacturing method
  • An active member array structure and the corresponding manufacturing method
  • An active member array structure and the corresponding manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0101] 3 is a top view of the first mask process of the active device array structure of the first embodiment of the present invention, and FIGS. 4A to 4D are cross-sectional views of lines AA', BB', CC' and DD' in FIG. 3 . Please refer to FIG. 3 and FIGS. 4A-4D first. The manufacturing method of the active device array structure of this embodiment is to form a first conductor layer (not shown) on a substrate 300 first, and perform a first masking process. The first conductive layer (not shown) is patterned into a first patterned conductive layer 310 . The first patterned conductor layer 310 includes a plurality of scan lines 312 , a plurality of gates 314 and a plurality of scan pads 316 , wherein the scan lines 312 are connected to the gates 314 and the scan pads 316 .

[0102] In this embodiment, the first patterned conductor layer 310 is, for example, a multi-layer metal stack structure composed of a first titanium metal layer 310A and a first aluminum metal layer 310B, w...

no. 2 example

[0124] FIG. 14 is an active device array structure according to the second embodiment of the present invention, and FIGS. 15A-15D are cross-sectional views along the lines AA', BB', CC' and DD' of FIG. 14 . Please refer to FIG. 14 and FIGS. 15A-15D , the active device array structure 600 is substantially the same as the active device array structure 380 of the first embodiment, wherein the active device array structure 600 further includes a patterned protective layer 680 disposed on the patterned flat layer 360 and the substrate 300. In addition, in this embodiment, the metal stack structure forming the gate 314, the scan line 312, and the scan pad 316 is, for example, a stack structure of aluminum metal and molybdenum metal, or a three-layer metal stack of aluminum / aluminum / molybdenum. structure. Meanwhile, the metal structure constituting the data line 332 , the source electrode 334 , the drain electrode 336 and the data pad 338 is, for example, a laminated structure compo...

no. 3 example

[0129] FIG. 16 shows the first mask process of the active device array structure of the third embodiment of the present invention, and FIGS. 17A-17D are drawn along the section lines AA', BB', CC' and DD' in FIG. 16 sectional view shown. Referring to FIG. 16 and FIGS. 17A˜17D , a first patterned conductor layer 702 is formed on a substrate 700 . The first patterned conductor layer 702 includes a laminated structure composed of a first aluminum metal layer and a first molybdenum metal layer. The first mask process, for example, uses a normal mask to perform photolithography and etching processes to form the first patterned conductor layer 702 .

[0130] In addition, the first patterned conductor layer 702 includes scan lines 704 , scan pads 706 , gates 708 , capacitor bottom electrodes 710 and auxiliary pads 712 . The scanning line 704, the scanning pad 706, the gate 708 and the capacitor bottom electrode 710 are connected to each other, wherein the scan pad 706 is located at...

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PUM

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Abstract

The invention relates to an active element array structure, which is arranged on a base plate, the invention includes a first patterning conductor layer, a patterning grid insulation layer, a patterning semiconductor layer, a second patterning conductor layer, a patterning flat layer and a transparent conductive layer. The patterning grid insulation layer is provided with a first opening to expose part of the first patterning conductor layer. The patterning semiconductor layer is arranged on the patterning grid insulation layer. The second patterning conductor layer is arranged on the patterning semiconductor layer. The patterning flat layer is provided with a second opening to expose part of the first patterning conductor layer and part of the second patterning conductor layer. The transparent conductive layer is comprehensively arranged on the base plate. Part of the transparent conductive layer which is arranged in the first opening and the second opening is disconnected between the base plate and the patterning flat layer. The active element array structure of the invention can be applied in a liquid crystal display panel to enhance the display opening rate of the liquid display crystal panel. The invention also provides a manufacturing method of the active element array structure, which can reduce needed processing cost during the manufacture of the active element array structure.

Description

technical field [0001] The present invention relates to an active element array structure and a manufacturing method thereof, and in particular to an active element array structure with a planar layer and a manufacturing method thereof. Background technique [0002] A thin film transistor liquid crystal display panel (Thin Film Transistor Liquid Crystal Display panel, TFT LCD panel) is mainly composed of an active device array structure (Active device array structure), a color filter array structure (Color filter array structure) and a liquid crystal layer. The array structure is composed of a plurality of active elements arranged in an array, that is, thin film transistors (Thin Film Transistor, TFT), and a pixel electrode (Pixel Electrode) corresponding to each thin film transistor. The above thin film transistor includes a gate, a channel region (Channel), a drain (Drain) and a source (Source), and the thin film transistor is used as a switch element of a liquid crystal d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L23/522H01L21/82H01L21/768G02F1/1362
CPCH01L24/06H01L2224/05554
Inventor 游伟盛方国龙林祥麟曾贤楷林汉涂
Owner AU OPTRONICS CORP
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