Stack type chip packaging structure and manufacturing method thereof

Abstract

The invention relates to a stacked clip packaging structure, which comprises a first packaging structure, a second packaging structure and a first seal adhesive material, wherein the first packaging structure comprises a first substrate and a first clip which is stacked on the first substrate and is electrically connected with the first substrate. The second packaging structure is stacked on the first packaging structure, and comprises a second substrate, a second clip and a plurality of nuggets, the second clip is electrically connected with the second substrate, and the second substrate is electrically connected with the first substrate. The second clip is fixed on the first clip through an adhesion layer, and a plurality of nuggets are arranged on the back surface of the second substrate. The first seal adhesive material is arranged on the first substrate, the first packaging structure and the second packaging structure are coated by the first seal adhesive material, the first seal adhesive material is equipped with a concave portion, and the nuggets are exposed.

Description

Technical field [0001] The invention relates to a chip packaging structure and a manufacturing method thereof, and in particular to a stacked chip packaging structure and a manufacturing method thereof. Background technique [0002] In today's information society, users are all electronic products that pursue high-speed, high-quality, and multi-task capabilities. In terms of product appearance, the design of electronic products is also moving towards the trend of light, thin, short and small. In order to achieve the above-mentioned goals, many companies have incorporated the concept of systemization when designing circuits, so that a single chip can have multiple functions to save the number of chips configured in electronic products. In addition, in terms of electronic packaging technology, in order to cope with the design trend of light, thin, short, and small, the packaging design concept of multi-chip module (MCM) and chip scale package (chip scale package, CSP) package des...

AI Technical Summary

Problems solved by technology

In this way, it is possible to overcome the problem of re-opening or modifying the original mold when filling the mold due to different chip sizes in the prior art.

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