Method for processing floating-point FFT by FPGA

Abstract

The invention discloses a method which utilizes FPGA to carry out the floating-point FFT processing, and relates to the signal processing technical field. The method aims to avoid the deficiency of the prior FFT processing method, exceeds the universal DSP processing method in the operation efficiency, and can finish the whole FFT processing in a shorter clock cycle. The method has the realization process that the input data are processed to be floating-point numbers; floating-point data are stored into an intermediate data memory 1 in order; the data are read from the intermediate data memory 1 to carry out a butterfly operation, and the processing result is stored into an intermediate data memory 2; the data are read from the intermediate data memory 2 to carry out the butterfly operation, and the processing result is stored in the intermediate data memory 1; the two operations are alternatively carried out until the FFT processing is over; the operation result is read from the intermediate data memory 1 or 2 according to the inverted order of the address; the output floating-point data are processed to be fixed-point numbers, and are output together with the floating-point result. The invention is applicable to the digital signal processing technology field, such as radar, communication, images, etc.

Description

technical field [0001] The invention belongs to the technical field of signal processing, and relates to how to use the field programmable gate array FPGA chip design to realize the fast Fourier transform (FFT) processing of floating-point 128, 256 and 1024-point radix-2 and radix-4 algorithms. The floating-point FFT processing method can be widely used in digital signal processing technical fields such as radar, communication, and image. Background technique [0002] With the development of digital signal processing technology, fast Fourier transform (FFT) theory has been more and more widely used in radar, image, communication and other fields, and how to realize FFT processing in engineering with higher speed and time efficiency has become more and more important. [0003] Traditionally, the methods commonly used to realize FFT processing mainly include: (1) design using a dedicated FFT processing chip, such as TMC2310, A41102, etc.; (2) design using a general-purpose pro...

AI Technical Summary

Problems solved by technology

The existing DSP has only one or two arithmetic units, that is to say, at most one or two floating-point multiplication operations can be performed at the same time, which will result in a lot of clock cycles consumed by the FFT process.

Therefore, even if the program instruction execution frequency is high, the processing time is still limited

[0005] (2) Parallel processing capability and pipeline series are limited

In some occasions of high-precision calculations, it is often necessary to use floating-point calculations. In this case, the existing FFT processing IP core functions will not meet the requirements

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