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Making method for multi-crystal silicon film transistor with the slight adulterated leakage pole area

A lightly doped drain and polysilicon thin film technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of reduced production tact, increased liquid crystal display manufacturing cost, and process complexity, so as to save processing costs Effect of improving LDD structure offset with processing time

Inactive Publication Date: 2008-08-06
上海广电光电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the current process requires an additional mask process to make the lightly doped drain region, which not only increases the manufacturing cost of the liquid crystal display, but also leads to process complexity, reduced production tact, and reduced yield

Method used

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  • Making method for multi-crystal silicon film transistor with the slight adulterated leakage pole area
  • Making method for multi-crystal silicon film transistor with the slight adulterated leakage pole area
  • Making method for multi-crystal silicon film transistor with the slight adulterated leakage pole area

Examples

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no. 1 example

[0017] 2A to 2E are flowcharts of manufacturing a polysilicon thin film transistor with a lightly doped drain (LDD) structure according to a first embodiment of the present invention. First, referring to FIG. 1A , a buffer layer 21 and a polysilicon layer are formed on a substrate 20 , and then a mask process is performed to form polysilicon islands 22 as shown in FIG. 2A . Next, as shown in FIG. 2B , a dielectric capping layer 23 is formed on the polysilicon 22 , and a conductive layer 24 is formed on the dielectric layer 23 . Then utilize the second mask to define a photoresist pattern layer 25, use the photoresist as a mask to etch, and adopt an over-etching process (such as wet etching) to etch away the photoresist that is not covered by the photoresist. The conductive layer covered by the pattern layer 25 and the part of the conductive layer covered by the photoresist pattern layer 25 are used to define the source / drain region and the LDD region; at the same time, the gat...

no. 2 example

[0020] 3A to 3E are the manufacturing process of the polysilicon thin film transistor with LDD structure according to the second embodiment of the present invention. Referring first to FIG. 3A and FIG. 3B , a polysilicon island 32 structure is formed, a dielectric layer 33 is formed on the polysilicon island 32 , and then a conductive layer 34 is deposited on the dielectric layer. This process is similar to FIG. 2A and FIG. 2B . Then referring to FIG. 3C, a photoresist pattern layer 35 is defined by a mask, and the photoresist is used as a mask for etching, but the over-etching process is not used, and only the source and drain regions and the gate 36 are defined; then , using the photoresist pattern layer 35 as a mask to carry out the heavy doping process 37, so that the part of the polysilicon island 32 not covered by the photoresist pattern 35 forms a heavily doped region 323 (N+ doped region or P+ doped region), the middle A part is an undoped region 321 . Referring to FI...

no. 3 example

[0022] Please refer to FIG. 4, the difference between the third embodiment and the above-mentioned first embodiment is that after the process in FIG. 2C, a photoresist heating process is performed to form a structure as shown in FIG. Doping the dielectric layer above the drain region. Afterwards, the heavily doped process of FIG. 2D is performed to form the heavily doped region 223 .

[0023] In summary, the manufacturing method of the polysilicon thin film transistor with LDD structure of the present invention does not need an additional mask to define the pattern of the LDD structure, which can save the processing cost and processing time brought by a mask, and can improve the photoetching process. The deviation of the LDD structure caused by alignment errors during medium exposure is beneficial to accurately define and form low-temperature polysilicon thin film transistors with LDD structures.

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Abstract

The invention relates to a manufacturing method for a polycrystalline silicon thin film transistor with a lightly doped drain region. The manufacturing method is characterized in that: after a polysilicon island is completed, a dielectric layer is formed on the polysilicon, and a grid electrode conducting layer is formed on the dielectric layer; then a photoresist pattern is formed on the grid electrode metallic layer by the photolithography; by utilizing the patterning photoresist as a mask, the grid electrode metallic layer is over-etched, forming the grid electrode metallic pattern; by utilizing the photoresist pattern as a mask, the heavily doped process is carried out, which makes the part of the polysilicon island which is not covered by the photoresist pattern form a heavily doped region; after the patterning photoresist is separated, the lightly doped process is carried out by utilizing the grid electrode metallic layer as a mask, which finishes an LDD structure. Compared with the prior art, the manufacturing method of the invention saves one masking process.

Description

technical field [0001] The invention relates to a method for manufacturing a low temperature polysilicon (LTPS) thin film transistor liquid crystal display device, in particular to a method for manufacturing a low temperature polysilicon thin film transistor with a lightly doped drain structure. Background technique [0002] Thin film transistor liquid crystal display (TFT-LCD) has become the main flat panel display at present, and thin film transistors can be divided into amorphous silicon and polysilicon thin film transistors. With people's pursuit of the quality of liquid crystal display, polysilicon thin film transistors are conducive to the realization of high-precision components and pixel arrangements due to their high electron mobility. Polysilicon has gradually replaced amorphous silicon and become the mainstream of thin film transistor technology development. In order to further suppress the leakage current (leakage current) of the polysilicon thin film transistor,...

Claims

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Application Information

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IPC IPC(8): H01L21/336
Inventor 田广彦李喜峰
Owner 上海广电光电子有限公司