System-on-chip apparatus with time shareable memory and method for operating such an apparatus
A system-on-chip and memory technology, which is applied to the architecture with a single central processing unit, general-purpose stored program computers, instruments, etc., can solve the problem of not being used, and achieve the effects of cost saving, memory saving, and chip area reduction
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[0040] exist figure 1 The system-on-chip device 1 shown in includes a first electronic component 2, a second electronic component 3, a central processing unit 4 as a third electronic component, a general purpose random access memory 5 as a fourth electronic component, and a multiplexer 6. The multiplexer is part of the system bus 7, and all these components are arranged on a common substrate 8 as an integrated circuit.
[0041]The first electronic component 2 is a wireless local area network transceiver, which is connected to a first external antenna 11 . It contains a first internal random access memory 9, for example, with a size of 2MBit as a buffer memory performing its special purpose communication function. The second electronic component 3 is a digital video broadcasting transceiver for handheld devices, which is connected to an outer second external antenna 12 . It contains a second internal random access memory 10 of 2MBit which acts as buffer memory for its special...
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